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@@ -0,0 +1,177 @@
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||||
/*
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* FreeRTOS Kernel V10.0.0
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||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
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||||
* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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||||
*
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||||
* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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// skip if included from IAR assembler
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#ifndef __IASMARM__
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// FIXME cause redundant-decls warnings
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extern uint32_t SystemCoreClock;
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#endif
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/* Cortex M23/M33 port configuration. */
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#define configENABLE_MPU 0
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#define configENABLE_FPU 0
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||||
#define configENABLE_TRUSTZONE 0
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||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
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#define configRUN_FREERTOS_SECURE_ONLY 1
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||||
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||||
#define configUSE_PREEMPTION 1
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||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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#define configCPU_CLOCK_HZ SystemCoreClock
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#define configTICK_RATE_HZ ( 1000 )
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( 128 )
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#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
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#define configMAX_TASK_NAME_LEN 16
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 4
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#define configUSE_QUEUE_SETS 0
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 0
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/* Hook function related definitions. */
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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||||
/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configUSE_TRACE_FACILITY 1 // legacy trace
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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||||
/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES 2
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/* Software timer related definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
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#define configTIMER_QUEUE_LENGTH 32
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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||||
/* Optional functions - most linkers will remove unused functions anyway. */
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#define INCLUDE_vTaskPrioritySet 0
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#define INCLUDE_uxTaskPriorityGet 0
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#define INCLUDE_vTaskDelete 0
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#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
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#define INCLUDE_xResumeFromISR 0
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xTaskGetSchedulerState 0
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#define INCLUDE_xTaskGetCurrentTaskHandle 1
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||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
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||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
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#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
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#define INCLUDE_pcTaskGetTaskName 0
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#define INCLUDE_eTaskGetState 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#ifdef __RX__
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/* Renesas RX series */
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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#define vTickISR INT_Excep_CMT0_CMI0
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#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
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#define configKERNEL_INTERRUPT_PRIORITY 1
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
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#else
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||||
/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define vPortSVCHandler SVC_Handler
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//--------------------------------------------------------------------+
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// Interrupt nesting behavior configuration.
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//--------------------------------------------------------------------+
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#if defined(__NVIC_PRIO_BITS)
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// For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#elif defined(__ECLIC_INTCTLBITS)
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// RISC-V Bumblebee core from nuclei
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#define configPRIO_BITS __ECLIC_INTCTLBITS
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#elif defined(__IASMARM__)
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// FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
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// Therefore we will hard coded it to minimum value of 2 to get pass ci build.
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// IAR user must update this to correct value of the target MCU
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#message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
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#define configPRIO_BITS 2
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||||
#else
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||||
#error "FreeRTOS configPRIO_BITS to be defined"
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||||
#endif
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||||
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||||
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
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||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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||||
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||||
/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
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||||
to all Cortex-M ports, and do not rely on any particular library functions. */
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||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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||||
|
||||
#endif
|
||||
|
||||
#endif /* __FREERTOS_CONFIG__H */
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||||
@@ -0,0 +1,19 @@
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||||
set(MCU_VARIANT rx63n)
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set(MCU_FAMILY RX63X)
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||||
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||||
set(CMAKE_SYSTEM_CPU rx610 CACHE INTERNAL "System Processor")
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||||
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||||
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/r5f5631fd.ld)
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||||
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||||
set(JLINK_DEVICE R5F5631F)
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||||
set(JLINK_IF JTAG)
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||||
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set(BOARD_SOURCES
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${CMAKE_CURRENT_LIST_DIR}/gr_citrus.c
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||||
)
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||||
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||||
function(update_board TARGET)
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||||
target_include_directories(${TARGET} PUBLIC
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||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
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)
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||||
endfunction()
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||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* metadata:
|
||||
name: GR Citrus
|
||||
url: https://www.renesas.com/en/products/gadget-renesas/boards/gr-citrus
|
||||
*/
|
||||
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||||
#ifndef BOARD_H_
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||||
#define BOARD_H_
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||||
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#include "iodefine.h"
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||||
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||||
#ifdef __cplusplus
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||||
extern "C" {
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||||
#endif
|
||||
|
||||
// LED: PA0, active high
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#define BOARD_LED_WRITE(state) (PORTA.PODR.BIT.B0 = (state) ? 1 : 0)
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// No user button
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#define BOARD_BUTTON_READ() 0
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// UART: SCI0
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#define BOARD_UART_SCI SCI0
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#define BOARD_SCI_TXI_HANDLER INT_Excep_SCI0_TXI0
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#define BOARD_SCI_TEI_HANDLER INT_Excep_SCI0_TEI0
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#define BOARD_SCI_RXI_HANDLER INT_Excep_SCI0_RXI0
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||||
|
||||
// USB interrupt handler
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||||
#define BOARD_USB_IRQ_HANDLER INT_Excep_USB0_USBI0
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||||
|
||||
// Clocks
|
||||
#define BOARD_PCLK 48000000
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||||
#define BOARD_CPUCLK 96000000
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
@@ -0,0 +1,22 @@
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||||
CFLAGS += \
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||||
-mcpu=rx610 \
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||||
-misa=v1 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_RX63X
|
||||
|
||||
MCU_DIR = hw/mcu/renesas/rx/rx63n
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(BOARD_PATH)/r5f5631fd.ld
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = R5F5631F
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JLINK_IF = JTAG
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||||
|
||||
# For flash-pyocd target
|
||||
PYOCD_TARGET =
|
||||
|
||||
# flash using jlink
|
||||
flash: flash-jlink
|
||||
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Koji Kitayama
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* How to connect JLink and GR-CITRUS
|
||||
*
|
||||
* GR-CITRUS needs to solder some pads to enable JTAG interface.
|
||||
* - Short the following pads individually with solder.
|
||||
* - J4
|
||||
* - J5
|
||||
* - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire.
|
||||
*
|
||||
* The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2).
|
||||
*
|
||||
* Connect the pins between GR-CITRUS and JLink as follows.
|
||||
*
|
||||
* | Function | GR-CITRUS pin | JLink pin No.| note |
|
||||
* |:---------:|:-------------:|:------------:|:--------:|
|
||||
* | VTref | 3.3V | 1 | |
|
||||
* | TRST | 5 | 3 | |
|
||||
* | GND | GND | 4 | |
|
||||
* | TDI | 3 | 5 | |
|
||||
* | TMS | 2 | 7 | |
|
||||
* | TCK/FINEC | 14 | 9 | short J4 |
|
||||
* | TDO | 9 | 13 | short J5 |
|
||||
* | nRES | RST | 15 | |
|
||||
*
|
||||
* JLink firmware needs to update to V6.96 or newer version to avoid
|
||||
* [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N)
|
||||
* regarding downloading.
|
||||
*/
|
||||
|
||||
#include "iodefine.h"
|
||||
#include "board.h"
|
||||
|
||||
#define SYSTEM_PRCR_PRC1 (1<<1)
|
||||
#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
|
||||
#define MPC_PFS_ISEL (1<<6)
|
||||
|
||||
#define IRQ_PRIORITY_SCI0 5
|
||||
#define SCI_PCLK 48000000
|
||||
|
||||
void HardwareSetup(void)
|
||||
{
|
||||
SYSTEM.PRCR.WORD = 0xA503u;
|
||||
SYSTEM.SOSCCR.BYTE = 0x01u;
|
||||
SYSTEM.MOSCWTCR.BYTE = 0x0Du;
|
||||
SYSTEM.PLLWTCR.BYTE = 0x0Eu;
|
||||
SYSTEM.PLLCR.WORD = 0x0F00u;
|
||||
SYSTEM.MOSCCR.BYTE = 0x00u;
|
||||
SYSTEM.PLLCR2.BYTE = 0x00u;
|
||||
for (unsigned i = 0; i < 2075u; ++i) __asm("nop");
|
||||
SYSTEM.SCKCR.LONG = 0x21021211u;
|
||||
SYSTEM.SCKCR2.WORD = 0x0033u;
|
||||
SYSTEM.SCKCR3.WORD = 0x0400u;
|
||||
SYSTEM.SYSCR0.WORD = 0x5A01;
|
||||
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
|
||||
SYSTEM.PRCR.WORD = 0xA500u;
|
||||
}
|
||||
|
||||
void board_pin_init(void)
|
||||
{
|
||||
/* Unlock MPC registers */
|
||||
MPC.PWPR.BIT.B0WI = 0;
|
||||
MPC.PWPR.BIT.PFSWE = 1;
|
||||
|
||||
/* LED PA0 */
|
||||
PORTA.PMR.BIT.B0 = 0U;
|
||||
PORTA.PODR.BIT.B0 = 0U;
|
||||
PORTA.PDR.BIT.B0 = 1U;
|
||||
|
||||
/* UART TXD0 => P20, RXD0 => P21 */
|
||||
PORT2.PMR.BIT.B0 = 1U;
|
||||
PORT2.PCR.BIT.B0 = 1U;
|
||||
MPC.P20PFS.BYTE = 0b01010;
|
||||
PORT2.PMR.BIT.B1 = 1U;
|
||||
MPC.P21PFS.BYTE = 0b01010;
|
||||
|
||||
/* USB VBUS -> P16 DPUPE -> P14 */
|
||||
PORT1.PMR.BIT.B4 = 1U;
|
||||
PORT1.PMR.BIT.B6 = 1U;
|
||||
MPC.P14PFS.BYTE = 0b10001;
|
||||
MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001;
|
||||
MPC.PFUSB0.BIT.PUPHZS = 1;
|
||||
|
||||
/* Lock MPC registers */
|
||||
MPC.PWPR.BIT.PFSWE = 0;
|
||||
MPC.PWPR.BIT.B0WI = 1;
|
||||
|
||||
/* Enable SCI0 */
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
|
||||
MSTP(SCI0) = 0;
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
|
||||
SCI0.BRR = (SCI_PCLK / (32 * 115200)) - 1;
|
||||
IR(SCI0, RXI0) = 0;
|
||||
IR(SCI0, TXI0) = 0;
|
||||
IR(SCI0, TEI0) = 0;
|
||||
IPR(SCI0, RXI0) = IRQ_PRIORITY_SCI0;
|
||||
IPR(SCI0, TXI0) = IRQ_PRIORITY_SCI0;
|
||||
IPR(SCI0, TEI0) = IRQ_PRIORITY_SCI0;
|
||||
IEN(SCI0, RXI0) = 1;
|
||||
IEN(SCI0, TXI0) = 1;
|
||||
IEN(SCI0, TEI0) = 1;
|
||||
}
|
||||
@@ -0,0 +1,127 @@
|
||||
__USTACK_SIZE = 0x00000400;
|
||||
__ISTACK_SIZE = 0x00000400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
RAM : ORIGIN = 0x4, LENGTH = 0x3fffc
|
||||
ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000
|
||||
}
|
||||
SECTIONS
|
||||
{
|
||||
.fvectors 0xFFFFFF80: AT(0xFFFFFF80)
|
||||
{
|
||||
KEEP(*(.fvectors))
|
||||
} > ROM
|
||||
.text 0xFFE00000: AT(0xFFE00000)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(P)
|
||||
etext = .;
|
||||
} > ROM
|
||||
.rvectors ALIGN(4):
|
||||
{
|
||||
_rvectors_start = .;
|
||||
KEEP(*(.rvectors))
|
||||
_rvectors_end = .;
|
||||
} > ROM
|
||||
.init :
|
||||
{
|
||||
KEEP(*(.init))
|
||||
__preinit_array_start = .;
|
||||
KEEP(*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
__init_array_start = (. + 3) & ~ 3;
|
||||
KEEP(*(.init_array))
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
__init_array_end = .;
|
||||
__fini_array_start = .;
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} > ROM
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(.fini))
|
||||
} > ROM
|
||||
.got :
|
||||
{
|
||||
*(.got)
|
||||
*(.got.plt)
|
||||
} > ROM
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(C_1)
|
||||
*(C_2)
|
||||
*(C)
|
||||
_erodata = .;
|
||||
} > ROM
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > ROM
|
||||
.eh_frame :
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > ROM
|
||||
.jcr :
|
||||
{
|
||||
*(.jcr)
|
||||
} > ROM
|
||||
.tors :
|
||||
{
|
||||
__CTOR_LIST__ = .;
|
||||
. = ALIGN(2);
|
||||
___ctors = .;
|
||||
*(.ctors)
|
||||
___ctors_end = .;
|
||||
__CTOR_END__ = .;
|
||||
__DTOR_LIST__ = .;
|
||||
___dtors = .;
|
||||
*(.dtors)
|
||||
___dtors_end = .;
|
||||
__DTOR_END__ = .;
|
||||
. = ALIGN(2);
|
||||
_mdata = .;
|
||||
} > ROM
|
||||
.data : AT(_mdata)
|
||||
{
|
||||
_data = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(D)
|
||||
*(D_1)
|
||||
*(D_2)
|
||||
_edata = .;
|
||||
} > RAM
|
||||
.gcc_exc :
|
||||
{
|
||||
*(.gcc_exc)
|
||||
} > RAM
|
||||
.bss :
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss)
|
||||
*(.bss.**)
|
||||
*(COMMON)
|
||||
*(B)
|
||||
*(B_1)
|
||||
*(B_2)
|
||||
_ebss = .;
|
||||
_end = .;
|
||||
} > RAM
|
||||
.ustack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
. = . + __USTACK_SIZE;
|
||||
PROVIDE(_ustack = .);
|
||||
} > RAM
|
||||
.istack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
. = . + __ISTACK_SIZE;
|
||||
PROVIDE(_istack = .);
|
||||
} > RAM
|
||||
}
|
||||
@@ -0,0 +1,22 @@
|
||||
set(MCU_VARIANT rx65n)
|
||||
set(MCU_FAMILY RX65X)
|
||||
|
||||
set(CMAKE_SYSTEM_CPU rx64m CACHE INTERNAL "System Processor")
|
||||
|
||||
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/r5f565ne.ld)
|
||||
|
||||
set(JLINK_DEVICE R5F565NE)
|
||||
set(JLINK_IF JTAG)
|
||||
|
||||
set(RFP_DEVICE rx65x)
|
||||
set(RFP_TOOL e2l)
|
||||
|
||||
set(BOARD_SOURCES
|
||||
${CMAKE_CURRENT_LIST_DIR}/rx65n_target.c
|
||||
)
|
||||
|
||||
function(update_board TARGET)
|
||||
target_include_directories(${TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
)
|
||||
endfunction()
|
||||
@@ -0,0 +1,71 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* metadata:
|
||||
name: RX65N Target Board
|
||||
url: https://www.renesas.com/en/products/microcontrollers-microprocessors/rx-32-bit-performance-efficiency-mcus/rtk5rx65n0c00000br-target-board-rx65n
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
#include "iodefine.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// LED: PD6, active low (open-drain)
|
||||
#define BOARD_LED_WRITE(state) (PORTD.PODR.BIT.B6 = (state) ? 0 : 1)
|
||||
|
||||
// Button: PB1, active low
|
||||
#define BOARD_BUTTON_READ() (PORTB.PIDR.BIT.B1 ? 0 : 1)
|
||||
|
||||
// UART: SCI5
|
||||
#define BOARD_UART_SCI SCI5
|
||||
#define BOARD_SCI_TXI_HANDLER INT_Excep_SCI5_TXI5
|
||||
#define BOARD_SCI_TEI_HANDLER INT_Excep_ICU_GROUPBL0 // SCI5 TEI uses group interrupt
|
||||
#define BOARD_SCI_RXI_HANDLER INT_Excep_SCI5_RXI5
|
||||
|
||||
// USB interrupt handler (software configurable vector)
|
||||
#define IRQ_USB0_USBI0 62
|
||||
#define SLIBR_USBI0 SLIBR185
|
||||
#define IR_USB0_USBI0 IR_PERIB_INTB185
|
||||
#define IER_USB0_USBI0 IER_PERIB_INTB185
|
||||
#define IEN_USB0_USBI0 IEN_PERIB_INTB185
|
||||
#define IPR_USB0_USBI0 IPR_PERIB_INTB185
|
||||
#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185
|
||||
#define BOARD_USB_IRQ_HANDLER INT_Excep_USB0_USBI0
|
||||
|
||||
// Clocks
|
||||
#define BOARD_PCLK 60000000
|
||||
#define BOARD_CPUCLK 120000000
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
@@ -0,0 +1,25 @@
|
||||
CFLAGS += \
|
||||
-mcpu=rx64m \
|
||||
-misa=v2 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_RX65X \
|
||||
-DIR_USB0_USBI0=IR_PERIB_INTB185 \
|
||||
-DIER_USB0_USBI0=IER_PERIB_INTB185 \
|
||||
-DIEN_USB0_USBI0=IEN_PERIB_INTB185
|
||||
|
||||
MCU_DIR = hw/mcu/renesas/rx/rx65n
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(BOARD_PATH)/r5f565ne.ld
|
||||
|
||||
# For freeRTOS port source
|
||||
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = R5F565NE
|
||||
JLINK_IF = JTAG
|
||||
|
||||
# For flash-pyocd target
|
||||
PYOCD_TARGET =
|
||||
|
||||
# flash using rfp-cli
|
||||
flash: flash-rfp
|
||||
@@ -0,0 +1,168 @@
|
||||
__USTACK_SIZE = 0x00000800;
|
||||
__ISTACK_SIZE = 0x00000800;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
RAM : ORIGIN = 0x4, LENGTH = 0x3fffc
|
||||
RAM2 : ORIGIN = 0x00800000, LENGTH = 0x60000
|
||||
OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128
|
||||
ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000
|
||||
}
|
||||
SECTIONS
|
||||
{
|
||||
.exvectors 0xFFFFFF80: AT(0xFFFFFF80)
|
||||
{
|
||||
"_exvectors_start" = .;
|
||||
KEEP(*(.exvectors))
|
||||
"_exvectors_end" = .;
|
||||
} >ROM
|
||||
.fvectors 0xFFFFFFFC: AT(0xFFFFFFFC)
|
||||
{
|
||||
KEEP(*(.fvectors))
|
||||
} > ROM
|
||||
.text 0xFFE00000: AT(0xFFE00000)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(P)
|
||||
KEEP(*(.text.*_isr))
|
||||
etext = .;
|
||||
} > ROM
|
||||
.rvectors ALIGN(4):
|
||||
{
|
||||
_rvectors_start = .;
|
||||
KEEP(*(.rvectors))
|
||||
_rvectors_end = .;
|
||||
} > ROM
|
||||
.init :
|
||||
{
|
||||
KEEP(*(.init))
|
||||
__preinit_array_start = .;
|
||||
KEEP(*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
__init_array_start = (. + 3) & ~ 3;
|
||||
KEEP(*(.init_array))
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
__init_array_end = .;
|
||||
__fini_array_start = .;
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} > ROM
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(.fini))
|
||||
} > ROM
|
||||
.got :
|
||||
{
|
||||
*(.got)
|
||||
*(.got.plt)
|
||||
} > ROM
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(C_1)
|
||||
*(C_2)
|
||||
*(C)
|
||||
_erodata = .;
|
||||
} > ROM
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > ROM
|
||||
.eh_frame :
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > ROM
|
||||
.jcr :
|
||||
{
|
||||
*(.jcr)
|
||||
} > ROM
|
||||
.tors :
|
||||
{
|
||||
__CTOR_LIST__ = .;
|
||||
. = ALIGN(2);
|
||||
___ctors = .;
|
||||
*(.ctors)
|
||||
___ctors_end = .;
|
||||
__CTOR_END__ = .;
|
||||
__DTOR_LIST__ = .;
|
||||
___dtors = .;
|
||||
*(.dtors)
|
||||
___dtors_end = .;
|
||||
__DTOR_END__ = .;
|
||||
. = ALIGN(2);
|
||||
_mdata = .;
|
||||
} > ROM
|
||||
.data : AT(_mdata)
|
||||
{
|
||||
_data = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(D)
|
||||
*(D_1)
|
||||
*(D_2)
|
||||
_edata = .;
|
||||
} > RAM
|
||||
.gcc_exc :
|
||||
{
|
||||
*(.gcc_exc)
|
||||
} > RAM
|
||||
.bss :
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss)
|
||||
*(.bss.**)
|
||||
*(COMMON)
|
||||
*(B)
|
||||
*(B_1)
|
||||
*(B_2)
|
||||
_ebss = .;
|
||||
_end = .;
|
||||
} > RAM
|
||||
.ustack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
. = . + __USTACK_SIZE;
|
||||
PROVIDE(_ustack = .);
|
||||
} > RAM
|
||||
.istack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
. = . + __ISTACK_SIZE;
|
||||
PROVIDE(_istack = .);
|
||||
} > RAM
|
||||
.ofs1 0xFE7F5D00: AT(0xFE7F5D00)
|
||||
{
|
||||
KEEP(*(.ofs1))
|
||||
} > OFS
|
||||
.ofs2 0xFE7F5D10: AT(0xFE7F5D10)
|
||||
{
|
||||
KEEP(*(.ofs2))
|
||||
} > OFS
|
||||
.ofs3 0xFE7F5D20: AT(0xFE7F5D20)
|
||||
{
|
||||
KEEP(*(.ofs3))
|
||||
} > OFS
|
||||
.ofs4 0xFE7F5D40: AT(0xFE7F5D40)
|
||||
{
|
||||
KEEP(*(.ofs4))
|
||||
} > OFS
|
||||
.ofs5 0xFE7F5D48: AT(0xFE7F5D48)
|
||||
{
|
||||
KEEP(*(.ofs5))
|
||||
} > OFS
|
||||
.ofs6 0xFE7F5D50: AT(0xFE7F5D50)
|
||||
{
|
||||
KEEP(*(.ofs6))
|
||||
} > OFS
|
||||
.ofs7 0xFE7F5D64: AT(0xFE7F5D64)
|
||||
{
|
||||
KEEP(*(.ofs7))
|
||||
} > OFS
|
||||
.ofs8 0xFE7F5D70: AT(0xFE7F5D70)
|
||||
{
|
||||
KEEP(*(.ofs8))
|
||||
} > OFS
|
||||
}
|
||||
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Koji Kitayama
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* How to connect JLink and RX65n Target and option board
|
||||
* (For original comment https://github.com/hathach/tinyusb/pull/922#issuecomment-869786131)
|
||||
*
|
||||
* To enable JTAG, RX65N requires following connections on main board.
|
||||
* - short EJ2 jumper header, to disable onboard E2L.
|
||||
* - short EMLE(J1-2) and 3V3(J1-14 or J2-10), to enable In-Circuit Emulator.
|
||||
*
|
||||
* Note: For RX65N-Cloud-Kit, the option board's JTAG pins to some switches or floating.
|
||||
* To use JLink with the option board, I think some further modifications will be necessary.
|
||||
*
|
||||
* | Function | RX65N pin | main board | option board | JLink connector |
|
||||
* |:---------:|:----------:|:----------:|:------------:|:---------------:|
|
||||
* | 3V3 | VCC | J1-14 | CN5-6 | 1 |
|
||||
* | TRST | P34 | J1-16 | CN5-7 | 3 |
|
||||
* | GND | VSS | J1-12 | CN5-5 | 4 |
|
||||
* | TDI | P30 | J1-20 | CN5-10 | 5 |
|
||||
* | TMS | P31 | J1-19 | USER_SW | 7 |
|
||||
* | TCK/FINEC | P27 | J1-21 | N/A | 9 |
|
||||
* | TDO | P26 | J1-22 | CN5-9 | 13 |
|
||||
* | nRES | RES# | J1-10 | RESET_SW | 15 |
|
||||
*
|
||||
* JLink firmware needs to update to V6.96 or newer version to avoid
|
||||
* [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N)
|
||||
* regarding downloading.
|
||||
*/
|
||||
|
||||
#include "iodefine.h"
|
||||
#include "board.h"
|
||||
|
||||
#define SYSTEM_PRCR_PRC1 (1<<1)
|
||||
#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
|
||||
#define MPC_PFS_ISEL (1<<6)
|
||||
|
||||
#define IRQ_PRIORITY_SCI5 5
|
||||
#define SCI_PCLK 60000000
|
||||
|
||||
void HardwareSetup(void)
|
||||
{
|
||||
FLASH.ROMCIV.WORD = 1;
|
||||
while (FLASH.ROMCIV.WORD) ;
|
||||
FLASH.ROMCE.WORD = 1;
|
||||
while (!FLASH.ROMCE.WORD) ;
|
||||
|
||||
SYSTEM.PRCR.WORD = 0xA503u;
|
||||
if (!SYSTEM.RSTSR1.BYTE) {
|
||||
RTC.RCR4.BYTE = 0;
|
||||
RTC.RCR3.BYTE = 12;
|
||||
while (12 != RTC.RCR3.BYTE) ;
|
||||
}
|
||||
SYSTEM.SOSCCR.BYTE = 1;
|
||||
|
||||
if (SYSTEM.HOCOCR.BYTE) {
|
||||
SYSTEM.HOCOCR.BYTE = 0;
|
||||
while (!SYSTEM.OSCOVFSR.BIT.HCOVF) ;
|
||||
}
|
||||
SYSTEM.PLLCR.WORD = 0x1D10u; /* HOCO x 15 */
|
||||
SYSTEM.PLLCR2.BYTE = 0;
|
||||
while (!SYSTEM.OSCOVFSR.BIT.PLOVF) ;
|
||||
|
||||
SYSTEM.SCKCR.LONG = 0x21C11222u;
|
||||
SYSTEM.SCKCR2.WORD = 0x0041u;
|
||||
SYSTEM.ROMWT.BYTE = 0x02u;
|
||||
while (0x02u != SYSTEM.ROMWT.BYTE) ;
|
||||
SYSTEM.SCKCR3.WORD = 0x400u;
|
||||
SYSTEM.PRCR.WORD = 0xA500u;
|
||||
}
|
||||
|
||||
void board_pin_init(void)
|
||||
{
|
||||
/* Setup software configurable interrupts for USB */
|
||||
ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0;
|
||||
ICU.SLIPRCR.BYTE = 1;
|
||||
|
||||
/* Unlock MPC registers */
|
||||
MPC.PWPR.BIT.B0WI = 0;
|
||||
MPC.PWPR.BIT.PFSWE = 1;
|
||||
|
||||
/* Button PB1 */
|
||||
PORTB.PMR.BIT.B1 = 0U;
|
||||
PORTB.PDR.BIT.B1 = 0U;
|
||||
|
||||
/* LED PD6 (open-drain, active low) */
|
||||
PORTD.PODR.BIT.B6 = 1U;
|
||||
PORTD.ODR1.BIT.B4 = 1U;
|
||||
PORTD.PMR.BIT.B6 = 0U;
|
||||
PORTD.PDR.BIT.B6 = 1U;
|
||||
|
||||
/* UART TXD5 => PA4, RXD5 => PA3 */
|
||||
PORTA.PMR.BIT.B4 = 1U;
|
||||
PORTA.PCR.BIT.B4 = 1U;
|
||||
MPC.PA4PFS.BYTE = 0b01010;
|
||||
PORTA.PMR.BIT.B3 = 1U;
|
||||
MPC.PA3PFS.BYTE = 0b01010;
|
||||
|
||||
/* USB VBUS -> P16 */
|
||||
PORT1.PMR.BIT.B6 = 1U;
|
||||
MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001;
|
||||
|
||||
/* Lock MPC registers */
|
||||
MPC.PWPR.BIT.PFSWE = 0;
|
||||
MPC.PWPR.BIT.B0WI = 1;
|
||||
|
||||
/* Enable SCI5 */
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
|
||||
MSTP(SCI5) = 0;
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
|
||||
SCI5.SEMR.BIT.ABCS = 1;
|
||||
SCI5.SEMR.BIT.BGDM = 1;
|
||||
SCI5.BRR = (SCI_PCLK / (8 * 115200)) - 1;
|
||||
IR(SCI5, RXI5) = 0;
|
||||
IR(SCI5, TXI5) = 0;
|
||||
IS(SCI5, TEI5) = 0;
|
||||
IR(ICU, GROUPBL0) = 0;
|
||||
IPR(SCI5, RXI5) = IRQ_PRIORITY_SCI5;
|
||||
IPR(SCI5, TXI5) = IRQ_PRIORITY_SCI5;
|
||||
IPR(ICU,GROUPBL0) = IRQ_PRIORITY_SCI5;
|
||||
IEN(SCI5, RXI5) = 1;
|
||||
IEN(SCI5, TXI5) = 1;
|
||||
IEN(ICU,GROUPBL0) = 1;
|
||||
EN(SCI5, TEI5) = 1;
|
||||
}
|
||||
+234
@@ -0,0 +1,234 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Koji Kitayama
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "bsp/board_api.h"
|
||||
#include "board.h"
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
#define SYSTEM_PRCR_PRC1 (1<<1)
|
||||
#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
|
||||
|
||||
#define CMT_CMCR_CKS_DIV_128 2
|
||||
#define CMT_CMCR_CMIE (1<<6)
|
||||
|
||||
#define IRQ_PRIORITY_CMT0 5
|
||||
#define IRQ_PRIORITY_USBI0 6
|
||||
|
||||
#define SCI_SSR_FER (1<<4)
|
||||
#define SCI_SSR_ORER (1<<5)
|
||||
#define SCI_SCR_TEIE (1u<<2)
|
||||
#define SCI_SCR_RE (1u<<4)
|
||||
#define SCI_SCR_TE (1u<<5)
|
||||
#define SCI_SCR_RIE (1u<<6)
|
||||
#define SCI_SCR_TIE (1u<<7)
|
||||
|
||||
// Board-specific pin/peripheral init (implemented per board)
|
||||
void board_pin_init(void);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// SCI UART interrupt handlers
|
||||
//--------------------------------------------------------------------+
|
||||
typedef struct {
|
||||
uint8_t *buf;
|
||||
uint32_t cnt;
|
||||
} sci_buf_t;
|
||||
static volatile sci_buf_t sci_buf[2];
|
||||
|
||||
void BOARD_SCI_TXI_HANDLER(void)
|
||||
{
|
||||
uint8_t *buf = sci_buf[0].buf;
|
||||
uint32_t cnt = sci_buf[0].cnt;
|
||||
|
||||
if (!buf || !cnt) {
|
||||
BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
|
||||
return;
|
||||
}
|
||||
BOARD_UART_SCI.TDR = *buf;
|
||||
if (--cnt) {
|
||||
++buf;
|
||||
} else {
|
||||
buf = NULL;
|
||||
BOARD_UART_SCI.SCR.BIT.TIE = 0;
|
||||
BOARD_UART_SCI.SCR.BIT.TEIE = 1;
|
||||
}
|
||||
sci_buf[0].buf = buf;
|
||||
sci_buf[0].cnt = cnt;
|
||||
}
|
||||
|
||||
void BOARD_SCI_TEI_HANDLER(void)
|
||||
{
|
||||
BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
|
||||
}
|
||||
|
||||
void BOARD_SCI_RXI_HANDLER(void)
|
||||
{
|
||||
uint8_t *buf = sci_buf[1].buf;
|
||||
uint32_t cnt = sci_buf[1].cnt;
|
||||
|
||||
if (!buf || !cnt ||
|
||||
(BOARD_UART_SCI.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
|
||||
sci_buf[1].buf = NULL;
|
||||
BOARD_UART_SCI.SSR.BYTE = 0;
|
||||
BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
|
||||
return;
|
||||
}
|
||||
*buf = BOARD_UART_SCI.RDR;
|
||||
if (--cnt) {
|
||||
++buf;
|
||||
} else {
|
||||
buf = NULL;
|
||||
BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
|
||||
}
|
||||
sci_buf[1].buf = buf;
|
||||
sci_buf[1].cnt = cnt;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void BOARD_USB_IRQ_HANDLER(void)
|
||||
{
|
||||
#if CFG_TUH_ENABLED
|
||||
tuh_int_handler(0, true);
|
||||
#endif
|
||||
#if CFG_TUD_ENABLED
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board init
|
||||
//--------------------------------------------------------------------+
|
||||
void board_init(void)
|
||||
{
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
/* Enable CMT0 */
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
|
||||
MSTP(CMT0) = 0;
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
|
||||
/* Setup 1ms tick timer */
|
||||
CMT0.CMCNT = 0;
|
||||
CMT0.CMCOR = BOARD_PCLK / 1000 / 128;
|
||||
CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
|
||||
IR(CMT0, CMI0) = 0;
|
||||
IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
|
||||
IEN(CMT0, CMI0) = 1;
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
#endif
|
||||
|
||||
/* Board-specific: pin mux, SCI, USB pin config */
|
||||
board_pin_init();
|
||||
|
||||
/* Enable USB0 module */
|
||||
unsigned short oldPRCR = SYSTEM.PRCR.WORD;
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
|
||||
MSTP(USB0) = 0;
|
||||
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | oldPRCR;
|
||||
|
||||
/* USB IRQ */
|
||||
IR(USB0, USBI0) = 0;
|
||||
IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
BOARD_LED_WRITE(state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return BOARD_BUTTON_READ();
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
sci_buf[1].buf = buf;
|
||||
sci_buf[1].cnt = len;
|
||||
BOARD_UART_SCI.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
|
||||
while (BOARD_UART_SCI.SCR.BIT.RE) ;
|
||||
return len - sci_buf[1].cnt;
|
||||
}
|
||||
|
||||
int board_uart_write(void const *buf, int len)
|
||||
{
|
||||
sci_buf[0].buf = (uint8_t*)(uintptr_t) buf;
|
||||
sci_buf[0].cnt = len;
|
||||
BOARD_UART_SCI.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
|
||||
while (BOARD_UART_SCI.SCR.BIT.TE) ;
|
||||
return len;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Tick timer
|
||||
//--------------------------------------------------------------------+
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void INT_Excep_CMT0_CMI0(void)
|
||||
{
|
||||
++system_ticks;
|
||||
}
|
||||
|
||||
uint32_t tusb_time_millis_api(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#else
|
||||
uint32_t SystemCoreClock = BOARD_CPUCLK;
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Newlib syscall stubs
|
||||
//--------------------------------------------------------------------+
|
||||
int close(int fd)
|
||||
{
|
||||
(void)fd;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int fstat(int fd, void *pstat)
|
||||
{
|
||||
(void)fd;
|
||||
(void)pstat;
|
||||
return 0;
|
||||
}
|
||||
|
||||
off_t lseek(int fd, off_t pos, int whence)
|
||||
{
|
||||
(void)fd;
|
||||
(void)pos;
|
||||
(void)whence;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int isatty(int fd)
|
||||
{
|
||||
(void)fd;
|
||||
return 1;
|
||||
}
|
||||
+83
@@ -0,0 +1,83 @@
|
||||
include_guard()
|
||||
|
||||
set(MCU_DIR ${TOP}/hw/mcu/renesas/rx)
|
||||
|
||||
# include board specific
|
||||
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||
|
||||
# toolchain set up
|
||||
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/rx_gcc.cmake)
|
||||
|
||||
set(FAMILY_MCUS ${MCU_FAMILY} CACHE INTERNAL "")
|
||||
|
||||
#------------------------------------
|
||||
# Startup & Linker script
|
||||
#------------------------------------
|
||||
set(LD_FILE_Clang ${LD_FILE_GNU})
|
||||
|
||||
#------------------------------------
|
||||
# Board Target
|
||||
#------------------------------------
|
||||
function(family_add_board BOARD_TARGET)
|
||||
add_library(${BOARD_TARGET} STATIC
|
||||
${MCU_DIR}/${MCU_VARIANT}/vects.c
|
||||
)
|
||||
target_include_directories(${BOARD_TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${MCU_DIR}/${MCU_VARIANT}
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
SSIZE_MAX=__INT_MAX__
|
||||
)
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
endfunction()
|
||||
|
||||
#------------------------------------
|
||||
# Functions
|
||||
#------------------------------------
|
||||
function(family_configure_example TARGET RTOS)
|
||||
family_configure_common(${TARGET} ${RTOS})
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_${MCU_FAMILY})
|
||||
|
||||
target_sources(${TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
|
||||
${TOP}/src/portable/renesas/rusb2/rusb2_common.c
|
||||
${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
|
||||
${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
|
||||
${MCU_DIR}/${MCU_VARIANT}/start.S
|
||||
${BOARD_SOURCES}
|
||||
)
|
||||
target_include_directories(${TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||
)
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
target_compile_options(${TARGET} PUBLIC
|
||||
-Wno-error=redundant-decls
|
||||
)
|
||||
target_link_options(${TARGET} PUBLIC
|
||||
"LINKER:--script=${LD_FILE_GNU}"
|
||||
-nostartfiles
|
||||
--specs=nosys.specs --specs=nano.specs
|
||||
)
|
||||
endif ()
|
||||
|
||||
set_source_files_properties(${MCU_DIR}/${MCU_VARIANT}/start.S PROPERTIES
|
||||
SKIP_LINTING ON
|
||||
COMPILE_OPTIONS -w)
|
||||
|
||||
# Suppress warnings for board-specific and family source files
|
||||
set_source_files_properties(
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||
${BOARD_SOURCES}
|
||||
PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
|
||||
|
||||
# Flashing
|
||||
family_add_bin_hex(${TARGET})
|
||||
family_flash_jlink(${TARGET})
|
||||
family_flash_rfp(${TARGET})
|
||||
endfunction()
|
||||
+38
@@ -0,0 +1,38 @@
|
||||
# Cross Compiler for RX
|
||||
CROSS_COMPILE = rx-elf-
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
|
||||
CFLAGS += \
|
||||
-nostartfiles \
|
||||
-ffunction-sections \
|
||||
-fdata-sections \
|
||||
-fshort-enums \
|
||||
-mlittle-endian-data \
|
||||
-DSSIZE_MAX=__INT_MAX__
|
||||
|
||||
# suppress warning caused by vendor mcu driver
|
||||
CFLAGS += -Wno-error=redundant-decls
|
||||
|
||||
LDFLAGS += -specs=nosys.specs -specs=nano.specs
|
||||
|
||||
SRC_C += \
|
||||
src/portable/renesas/rusb2/dcd_rusb2.c \
|
||||
src/portable/renesas/rusb2/hcd_rusb2.c \
|
||||
src/portable/renesas/rusb2/rusb2_common.c \
|
||||
$(MCU_DIR)/vects.c \
|
||||
$(FAMILY_PATH)/family.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
$(TOP)/$(MCU_DIR)
|
||||
|
||||
SRC_S += $(MCU_DIR)/start.S
|
||||
|
||||
$(BUILD)/$(PROJECT).mot: $(BUILD)/$(PROJECT).elf
|
||||
@echo CREATE $@
|
||||
$(OBJCOPY) -O srec -I elf32-rx-be-ns $^ $@
|
||||
|
||||
# flash using rfp-cli
|
||||
flash-rfp: $(BUILD)/$(PROJECT).mot
|
||||
rfp-cli -device rx65x -tool e2l -if fine -fo id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auth id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auto $^
|
||||
Reference in new issue
Block a user