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@@ -0,0 +1,19 @@
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set(MCU_VARIANT rx63n)
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set(MCU_FAMILY RX63X)
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set(CMAKE_SYSTEM_CPU rx610 CACHE INTERNAL "System Processor")
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/r5f5631fd.ld)
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set(JLINK_DEVICE R5F5631F)
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set(JLINK_IF JTAG)
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set(BOARD_SOURCES
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${CMAKE_CURRENT_LIST_DIR}/gr_citrus.c
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)
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function(update_board TARGET)
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target_include_directories(${TARGET} PUBLIC
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}
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)
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endfunction()
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@@ -0,0 +1,64 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* metadata:
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name: GR Citrus
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url: https://www.renesas.com/en/products/gadget-renesas/boards/gr-citrus
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#include "iodefine.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// LED: PA0, active high
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#define BOARD_LED_WRITE(state) (PORTA.PODR.BIT.B0 = (state) ? 1 : 0)
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// No user button
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#define BOARD_BUTTON_READ() 0
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// UART: SCI0
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#define BOARD_UART_SCI SCI0
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#define BOARD_SCI_TXI_HANDLER INT_Excep_SCI0_TXI0
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#define BOARD_SCI_TEI_HANDLER INT_Excep_SCI0_TEI0
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#define BOARD_SCI_RXI_HANDLER INT_Excep_SCI0_RXI0
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// USB interrupt handler
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#define BOARD_USB_IRQ_HANDLER INT_Excep_USB0_USBI0
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// Clocks
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#define BOARD_PCLK 48000000
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#define BOARD_CPUCLK 96000000
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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@@ -0,0 +1,22 @@
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CFLAGS += \
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-mcpu=rx610 \
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-misa=v1 \
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-DCFG_TUSB_MCU=OPT_MCU_RX63X
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MCU_DIR = hw/mcu/renesas/rx/rx63n
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/r5f5631fd.ld
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# For freeRTOS port source
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600
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# For flash-jlink target
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JLINK_DEVICE = R5F5631F
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JLINK_IF = JTAG
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# For flash-pyocd target
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PYOCD_TARGET =
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# flash using jlink
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flash: flash-jlink
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@@ -0,0 +1,126 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Koji Kitayama
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* How to connect JLink and GR-CITRUS
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*
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* GR-CITRUS needs to solder some pads to enable JTAG interface.
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* - Short the following pads individually with solder.
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* - J4
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* - J5
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* - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire.
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*
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* The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2).
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*
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* Connect the pins between GR-CITRUS and JLink as follows.
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*
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* | Function | GR-CITRUS pin | JLink pin No.| note |
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* |:---------:|:-------------:|:------------:|:--------:|
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* | VTref | 3.3V | 1 | |
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* | TRST | 5 | 3 | |
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* | GND | GND | 4 | |
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* | TDI | 3 | 5 | |
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* | TMS | 2 | 7 | |
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* | TCK/FINEC | 14 | 9 | short J4 |
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* | TDO | 9 | 13 | short J5 |
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* | nRES | RST | 15 | |
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*
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* JLink firmware needs to update to V6.96 or newer version to avoid
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* [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N)
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* regarding downloading.
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*/
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#include "iodefine.h"
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#include "board.h"
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#define SYSTEM_PRCR_PRC1 (1<<1)
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#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
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#define MPC_PFS_ISEL (1<<6)
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#define IRQ_PRIORITY_SCI0 5
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#define SCI_PCLK 48000000
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void HardwareSetup(void)
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{
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SYSTEM.PRCR.WORD = 0xA503u;
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SYSTEM.SOSCCR.BYTE = 0x01u;
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SYSTEM.MOSCWTCR.BYTE = 0x0Du;
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SYSTEM.PLLWTCR.BYTE = 0x0Eu;
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SYSTEM.PLLCR.WORD = 0x0F00u;
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SYSTEM.MOSCCR.BYTE = 0x00u;
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SYSTEM.PLLCR2.BYTE = 0x00u;
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for (unsigned i = 0; i < 2075u; ++i) __asm("nop");
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SYSTEM.SCKCR.LONG = 0x21021211u;
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SYSTEM.SCKCR2.WORD = 0x0033u;
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SYSTEM.SCKCR3.WORD = 0x0400u;
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SYSTEM.SYSCR0.WORD = 0x5A01;
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SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
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SYSTEM.PRCR.WORD = 0xA500u;
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}
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void board_pin_init(void)
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{
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/* Unlock MPC registers */
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MPC.PWPR.BIT.B0WI = 0;
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MPC.PWPR.BIT.PFSWE = 1;
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/* LED PA0 */
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PORTA.PMR.BIT.B0 = 0U;
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PORTA.PODR.BIT.B0 = 0U;
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PORTA.PDR.BIT.B0 = 1U;
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/* UART TXD0 => P20, RXD0 => P21 */
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PORT2.PMR.BIT.B0 = 1U;
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PORT2.PCR.BIT.B0 = 1U;
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MPC.P20PFS.BYTE = 0b01010;
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PORT2.PMR.BIT.B1 = 1U;
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MPC.P21PFS.BYTE = 0b01010;
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/* USB VBUS -> P16 DPUPE -> P14 */
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PORT1.PMR.BIT.B4 = 1U;
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PORT1.PMR.BIT.B6 = 1U;
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MPC.P14PFS.BYTE = 0b10001;
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MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001;
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MPC.PFUSB0.BIT.PUPHZS = 1;
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/* Lock MPC registers */
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MPC.PWPR.BIT.PFSWE = 0;
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MPC.PWPR.BIT.B0WI = 1;
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/* Enable SCI0 */
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
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MSTP(SCI0) = 0;
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SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
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SCI0.BRR = (SCI_PCLK / (32 * 115200)) - 1;
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IR(SCI0, RXI0) = 0;
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IR(SCI0, TXI0) = 0;
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IR(SCI0, TEI0) = 0;
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IPR(SCI0, RXI0) = IRQ_PRIORITY_SCI0;
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IPR(SCI0, TXI0) = IRQ_PRIORITY_SCI0;
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IPR(SCI0, TEI0) = IRQ_PRIORITY_SCI0;
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IEN(SCI0, RXI0) = 1;
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IEN(SCI0, TXI0) = 1;
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IEN(SCI0, TEI0) = 1;
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}
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@@ -0,0 +1,127 @@
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__USTACK_SIZE = 0x00000400;
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__ISTACK_SIZE = 0x00000400;
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MEMORY
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{
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RAM : ORIGIN = 0x4, LENGTH = 0x3fffc
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ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000
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}
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SECTIONS
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{
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.fvectors 0xFFFFFF80: AT(0xFFFFFF80)
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{
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KEEP(*(.fvectors))
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} > ROM
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.text 0xFFE00000: AT(0xFFE00000)
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{
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*(.text)
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*(.text.*)
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*(P)
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etext = .;
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} > ROM
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.rvectors ALIGN(4):
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{
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_rvectors_start = .;
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KEEP(*(.rvectors))
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_rvectors_end = .;
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} > ROM
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.init :
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{
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KEEP(*(.init))
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__preinit_array_start = .;
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KEEP(*(.preinit_array))
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__preinit_array_end = .;
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__init_array_start = (. + 3) & ~ 3;
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KEEP(*(.init_array))
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KEEP(*(SORT(.init_array.*)))
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__init_array_end = .;
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__fini_array_start = .;
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KEEP(*(.fini_array))
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KEEP(*(SORT(.fini_array.*)))
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__fini_array_end = .;
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} > ROM
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.fini :
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{
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KEEP(*(.fini))
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} > ROM
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.got :
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{
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*(.got)
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*(.got.plt)
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} > ROM
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.rodata :
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{
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*(.rodata)
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*(.rodata.*)
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*(C_1)
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*(C_2)
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*(C)
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_erodata = .;
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} > ROM
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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} > ROM
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.eh_frame :
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{
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*(.eh_frame)
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} > ROM
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.jcr :
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{
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*(.jcr)
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} > ROM
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.tors :
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{
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__CTOR_LIST__ = .;
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. = ALIGN(2);
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___ctors = .;
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*(.ctors)
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___ctors_end = .;
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__CTOR_END__ = .;
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__DTOR_LIST__ = .;
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___dtors = .;
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*(.dtors)
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___dtors_end = .;
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__DTOR_END__ = .;
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. = ALIGN(2);
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_mdata = .;
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} > ROM
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.data : AT(_mdata)
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{
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_data = .;
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*(.data)
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*(.data.*)
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*(D)
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*(D_1)
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*(D_2)
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_edata = .;
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} > RAM
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.gcc_exc :
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{
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*(.gcc_exc)
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} > RAM
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.bss :
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{
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_bss = .;
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*(.bss)
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*(.bss.**)
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*(COMMON)
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*(B)
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*(B_1)
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*(B_2)
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_ebss = .;
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_end = .;
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} > RAM
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.ustack :
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{
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. = ALIGN(8);
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. = . + __USTACK_SIZE;
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PROVIDE(_ustack = .);
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} > RAM
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.istack :
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{
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. = ALIGN(8);
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. = . + __ISTACK_SIZE;
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PROVIDE(_istack = .);
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} > RAM
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}
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