initial commit

third_party/tinyusb/hw/bsp/same7x/boards/same70_qmtech/board.cmake

@@ -0,0 +1,11 @@
+set(JLINK_DEVICE ATSAME70N19B)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/same70n19b_flash.ld)
+
+# N19B and Q21B share the same vector table / startup code
+set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70q21b.c)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAME70N19B__
+    )
+endfunction()

third_party/tinyusb/hw/bsp/same7x/boards/same70_qmtech/board.h

@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAME70 QMTech
+   manufacturer: Microchip
+   url: https://www.aliexpress.com/item/1005003173783268.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PIN GPIO(GPIO_PORTA, 15)
+#define LED_STATE_ON 1
+#define LED_PORT_CLOCK ID_PIOB
+
+#define BUTTON_PIN GPIO(GPIO_PORTA, 21)
+#define BUTTON_STATE_ACTIVE 0
+#define BUTTON_PORT_CLOCK ID_PIOA
+
+#define UART_TX_PIN GPIO(GPIO_PORTB, 1)
+#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#define UART_RX_PIN GPIO(GPIO_PORTB, 0)
+#define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
+#define UART_PORT_CLOCK ID_USART1
+#define BOARD_USART USART1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */

third_party/tinyusb/hw/bsp/same7x/boards/same70_qmtech/board.mk

@@ -0,0 +1,6 @@
+CFLAGS += -D__SAME70N19B__
+
+LD_FILE = $(BOARD_PATH)/same70n19b_flash.ld
+STARTUP_FILE = $(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c
+
+JLINK_DEVICE = ATSAME70N19B

third_party/tinyusb/hw/bsp/same7x/boards/same70_qmtech/hpl_usart_config.h

@@ -0,0 +1,215 @@
+/* Auto-generated config file hpl_usart_config.h */
+#ifndef HPL_USART_CONFIG_H
+#define HPL_USART_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#ifndef CONF_USART_1_ENABLE
+#define CONF_USART_1_ENABLE 1
+#endif
+
+// <h> Basic Configuration
+
+// <o> Frame parity
+// <0x0=>Even parity
+// <0x1=>Odd parity
+// <0x2=>Parity forced to 0
+// <0x3=>Parity forced to 1
+// <0x4=>No parity
+// <i> Parity bit mode for USART frame
+// <id> usart_parity
+#ifndef CONF_USART_1_PARITY
+#define CONF_USART_1_PARITY 0x4
+#endif
+
+// <o> Character Size
+// <0x0=>5 bits
+// <0x1=>6 bits
+// <0x2=>7 bits
+// <0x3=>8 bits
+// <i> Data character size in USART frame
+// <id> usart_character_size
+#ifndef CONF_USART_1_CHSIZE
+#define CONF_USART_1_CHSIZE 0x3
+#endif
+
+// <o> Stop Bit
+// <0=>1 stop bit
+// <1=>1.5 stop bits
+// <2=>2 stop bits
+// <i> Number of stop bits in USART frame
+// <id> usart_stop_bit
+#ifndef CONF_USART_1_SBMODE
+#define CONF_USART_1_SBMODE 0
+#endif
+
+// <o> Clock Output Select
+// <0=>The USART does not drive the SCK pin
+// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
+// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
+// <id> usart_clock_output_select
+#ifndef CONF_USART_1_CLKO
+#define CONF_USART_1_CLKO 0
+#endif
+
+// <o> Baud rate <1-3000000>
+// <i> USART baud rate setting
+// <id> usart_baud_rate
+#ifndef CONF_USART_1_BAUD
+#define CONF_USART_1_BAUD 9600
+#endif
+
+// </h>
+
+// <e> Advanced configuration
+// <id> usart_advanced
+#ifndef CONF_USART_1_ADVANCED_CONFIG
+#define CONF_USART_1_ADVANCED_CONFIG 0
+#endif
+
+// <o> Channel Mode
+// <0=>Normal Mode
+// <1=>Automatic Echo
+// <2=>Local Loopback
+// <3=>Remote Loopback
+// <i> Channel mode in USART frame
+// <id> usart_channel_mode
+#ifndef CONF_USART_1_CHMODE
+#define CONF_USART_1_CHMODE 0
+#endif
+
+// <q> 9 bits character enable
+// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
+// <id> usart_9bits_enable
+#ifndef CONF_USART_1_MODE9
+#define CONF_USART_1_MODE9 0
+#endif
+
+// <o> Variable Sync
+// <0=>User defined configuration
+// <1=>sync field is updated when a character is written into US_THR
+// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
+// <id> variable_sync
+#ifndef CONF_USART_1_VAR_SYNC
+#define CONF_USART_1_VAR_SYNC 0
+#endif
+
+// <o> Oversampling Mode
+// <0=>16 Oversampling
+// <1=>8 Oversampling
+// <i> Oversampling Mode in UART mode
+// <id> usart__oversampling_mode
+#ifndef CONF_USART_1_OVER
+#define CONF_USART_1_OVER 0
+#endif
+
+// <o> Inhibit Non Ack
+// <0=>The NACK is generated
+// <1=>The NACK is not generated
+// <i> Inhibit Non Acknowledge
+// <id> usart__inack
+#ifndef CONF_USART_1_INACK
+#define CONF_USART_1_INACK 1
+#endif
+
+// <o> Disable Successive NACK
+// <0=>NACK is sent on the ISO line as soon as a parity error occurs
+// <1=>Many parity errors generate a NACK on the ISO line
+// <i> Disable Successive NACK
+// <id> usart_dsnack
+#ifndef CONF_USART_1_DSNACK
+#define CONF_USART_1_DSNACK 0
+#endif
+
+// <o> Inverted Data
+// <0=>Data isn't inverted, nomal mode
+// <1=>Data is inverted
+// <i> Inverted Data
+// <id> usart_invdata
+#ifndef CONF_USART_1_INVDATA
+#define CONF_USART_1_INVDATA 0
+#endif
+
+// <o> Maximum Number of Automatic Iteration <0-7>
+// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
+// <id> usart_max_iteration
+#ifndef CONF_USART_1_MAX_ITERATION
+#define CONF_USART_1_MAX_ITERATION 0
+#endif
+
+// <q> Receive Line Filter enable
+// <i> whether the USART filters the receive line using a three-sample filter
+// <id> usart_receive_filter_enable
+#ifndef CONF_USART_1_FILTER
+#define CONF_USART_1_FILTER 0
+#endif
+
+// <q> Manchester Encoder/Decoder Enable
+// <i> whether the USART Manchester Encoder/Decoder
+// <id> usart_manchester_filter_enable
+#ifndef CONF_USART_1_MAN
+#define CONF_USART_1_MAN 0
+#endif
+
+// <o> Manchester Synchronization Mode
+// <0=>The Manchester start bit is a 0 to 1 transition
+// <1=>The Manchester start bit is a 1 to 0 transition
+// <i> Manchester Synchronization Mode
+// <id> usart_manchester_synchronization_mode
+#ifndef CONF_USART_1_MODSYNC
+#define CONF_USART_1_MODSYNC 0
+#endif
+
+// <o> Start Frame Delimiter Selector
+// <0=>Start frame delimiter is COMMAND or DATA SYNC
+// <1=>Start frame delimiter is one bit
+// <i> Start Frame Delimiter Selector
+// <id> usart_start_frame_delimiter
+#ifndef CONF_USART_1_ONEBIT
+#define CONF_USART_1_ONEBIT 0
+#endif
+
+// <o> Fractional Part <0-7>
+// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
+// <id> usart_arch_fractional
+#ifndef CONF_USART_1_FRACTIONAL
+#define CONF_USART_1_FRACTIONAL 0x0
+#endif
+
+// <o> Data Order
+// <0=>LSB is transmitted first
+// <1=>MSB is transmitted first
+// <i> Data order of the data bits in the frame
+// <id> usart_arch_msbf
+#ifndef CONF_USART_1_MSBF
+#define CONF_USART_1_MSBF 0
+#endif
+
+// </e>
+
+#define CONF_USART_1_MODE 0x0
+
+// Calculate BAUD register value in UART mode
+#if CONF_USART1_CK_SRC < 3
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP                                                                                           \
+	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
+#endif
+#elif CONF_USART1_CK_SRC == 3
+// No division is active. The value written in US_BRGR has no effect.
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD 1
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP 1
+#endif
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // HPL_USART_CONFIG_H

third_party/tinyusb/hw/bsp/same7x/boards/same70_qmtech/peripheral_clk_config.h

@@ -0,0 +1,126 @@
+/* Auto-generated config file peripheral_clk_config.h */
+#ifndef PERIPHERAL_CLK_CONFIG_H
+#define PERIPHERAL_CLK_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+/**
+ * \def CONF_HCLK_FREQUENCY
+ * \brief HCLK's Clock frequency
+ */
+#ifndef CONF_HCLK_FREQUENCY
+#define CONF_HCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_FCLK_FREQUENCY
+ * \brief FCLK's Clock frequency
+ */
+#ifndef CONF_FCLK_FREQUENCY
+#define CONF_FCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_CPU_FREQUENCY
+ * \brief CPU's Clock frequency
+ */
+#ifndef CONF_CPU_FREQUENCY
+#define CONF_CPU_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_SLCK_FREQUENCY
+ * \brief Slow Clock frequency
+ */
+#define CONF_SLCK_FREQUENCY 0
+
+/**
+ * \def CONF_MCK_FREQUENCY
+ * \brief Master Clock frequency
+ */
+#define CONF_MCK_FREQUENCY 150000000
+
+/**
+ * \def CONF_PCK6_FREQUENCY
+ * \brief Programmable Clock Controller 6 frequency
+ */
+#define CONF_PCK6_FREQUENCY 1714285
+
+// <h> USART Clock Settings
+// <o> USART Clock source
+
+// <0=> Master Clock (MCK)
+// <1=> MCK / 8 for USART
+// <2=> Programmable Clock Controller 4 (PMC_PCK4)
+// <3=> External Clock
+// <i> This defines the clock source for the USART
+// <id> usart_clock_source
+#ifndef CONF_USART1_CK_SRC
+#define CONF_USART1_CK_SRC 0
+#endif
+
+// <o> USART External Clock Input on SCK <1-4294967295>
+// <i> Inputs the external clock frequency on SCK
+// <id> usart_clock_freq
+#ifndef CONF_USART1_SCK_FREQ
+#define CONF_USART1_SCK_FREQ 10000000
+#endif
+
+// </h>
+
+/**
+ * \def USART FREQUENCY
+ * \brief USART's Clock frequency
+ */
+#ifndef CONF_USART1_FREQUENCY
+#define CONF_USART1_FREQUENCY 150000000
+#endif
+
+#ifndef CONF_SRC_USB_480M
+#define CONF_SRC_USB_480M 0
+#endif
+
+#ifndef CONF_SRC_USB_48M
+#define CONF_SRC_USB_48M 1
+#endif
+
+// <y> USB Full/Low Speed Clock
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_fsls_clock_source
+// <i> 48MHz clock source for low speed and full speed.
+// <i> It must be available when low speed is supported by host driver.
+// <i> It must be available when low power mode is selected.
+#ifndef CONF_USBHS_FSLS_SRC
+#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
+#endif
+
+// <y> USB Clock Source(Normal/Low-power Mode Selection)
+// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_clock_source
+// <i> Select the clock source for USB.
+// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
+// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
+#ifndef CONF_USBHS_SRC
+#define CONF_USBHS_SRC CONF_SRC_USB_480M
+#endif
+
+/**
+ * \def CONF_USBHS_FSLS_FREQUENCY
+ * \brief USBHS's Full/Low Speed Clock Source frequency
+ */
+#ifndef CONF_USBHS_FSLS_FREQUENCY
+#define CONF_USBHS_FSLS_FREQUENCY 48000000
+#endif
+
+/**
+ * \def CONF_USBHS_FREQUENCY
+ * \brief USBHS's Selected Clock Source frequency
+ */
+#ifndef CONF_USBHS_FREQUENCY
+#define CONF_USBHS_FREQUENCY 480000000
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // PERIPHERAL_CLK_CONFIG_H

third_party/tinyusb/hw/bsp/same7x/boards/same70_xplained/board.cmake

@@ -0,0 +1,12 @@
+set(JLINK_DEVICE ATSAME70Q21B)
+set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
+set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70q21b/flash.icf)
+
+set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70q21b.c)
+set(STARTUP_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/iar/startup_same70q21b.c)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAME70Q21B__
+    )
+endfunction()

third_party/tinyusb/hw/bsp/same7x/boards/same70_xplained/board.h

@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to do so, subject to the
+ * following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAME70 Xplained
+   manufacturer: Microchip
+   url: https://www.microchip.com/en-us/development-tool/atsame70-xpld
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PIN GPIO(GPIO_PORTC, 8)
+#define LED_STATE_ON 1
+#define LED_PORT_CLOCK ID_PIOC
+
+#define BUTTON_PIN GPIO(GPIO_PORTA, 11)
+#define BUTTON_STATE_ACTIVE 0
+#define BUTTON_PORT_CLOCK ID_PIOA
+
+#define UART_TX_PIN GPIO(GPIO_PORTB, 4)
+#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#define UART_RX_PIN GPIO(GPIO_PORTA, 21)
+#define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
+#define UART_PORT_CLOCK ID_USART1
+#define BOARD_USART USART1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */

third_party/tinyusb/hw/bsp/same7x/boards/same70_xplained/board.mk

@@ -0,0 +1,6 @@
+CFLAGS += -D__SAME70Q21B__
+
+LD_FILE = $(SDK_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
+STARTUP_FILE = $(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c
+
+JLINK_DEVICE = ATSAME70Q21B

third_party/tinyusb/hw/bsp/same7x/boards/same70_xplained/hpl_usart_config.h

@@ -0,0 +1,215 @@
+/* Auto-generated config file hpl_usart_config.h */
+#ifndef HPL_USART_CONFIG_H
+#define HPL_USART_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#ifndef CONF_USART_1_ENABLE
+#define CONF_USART_1_ENABLE 1
+#endif
+
+// <h> Basic Configuration
+
+// <o> Frame parity
+// <0x0=>Even parity
+// <0x1=>Odd parity
+// <0x2=>Parity forced to 0
+// <0x3=>Parity forced to 1
+// <0x4=>No parity
+// <i> Parity bit mode for USART frame
+// <id> usart_parity
+#ifndef CONF_USART_1_PARITY
+#define CONF_USART_1_PARITY 0x4
+#endif
+
+// <o> Character Size
+// <0x0=>5 bits
+// <0x1=>6 bits
+// <0x2=>7 bits
+// <0x3=>8 bits
+// <i> Data character size in USART frame
+// <id> usart_character_size
+#ifndef CONF_USART_1_CHSIZE
+#define CONF_USART_1_CHSIZE 0x3
+#endif
+
+// <o> Stop Bit
+// <0=>1 stop bit
+// <1=>1.5 stop bits
+// <2=>2 stop bits
+// <i> Number of stop bits in USART frame
+// <id> usart_stop_bit
+#ifndef CONF_USART_1_SBMODE
+#define CONF_USART_1_SBMODE 0
+#endif
+
+// <o> Clock Output Select
+// <0=>The USART does not drive the SCK pin
+// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
+// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
+// <id> usart_clock_output_select
+#ifndef CONF_USART_1_CLKO
+#define CONF_USART_1_CLKO 0
+#endif
+
+// <o> Baud rate <1-3000000>
+// <i> USART baud rate setting
+// <id> usart_baud_rate
+#ifndef CONF_USART_1_BAUD
+#define CONF_USART_1_BAUD 9600
+#endif
+
+// </h>
+
+// <e> Advanced configuration
+// <id> usart_advanced
+#ifndef CONF_USART_1_ADVANCED_CONFIG
+#define CONF_USART_1_ADVANCED_CONFIG 0
+#endif
+
+// <o> Channel Mode
+// <0=>Normal Mode
+// <1=>Automatic Echo
+// <2=>Local Loopback
+// <3=>Remote Loopback
+// <i> Channel mode in USART frame
+// <id> usart_channel_mode
+#ifndef CONF_USART_1_CHMODE
+#define CONF_USART_1_CHMODE 0
+#endif
+
+// <q> 9 bits character enable
+// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
+// <id> usart_9bits_enable
+#ifndef CONF_USART_1_MODE9
+#define CONF_USART_1_MODE9 0
+#endif
+
+// <o> Variable Sync
+// <0=>User defined configuration
+// <1=>sync field is updated when a character is written into US_THR
+// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
+// <id> variable_sync
+#ifndef CONF_USART_1_VAR_SYNC
+#define CONF_USART_1_VAR_SYNC 0
+#endif
+
+// <o> Oversampling Mode
+// <0=>16 Oversampling
+// <1=>8 Oversampling
+// <i> Oversampling Mode in UART mode
+// <id> usart__oversampling_mode
+#ifndef CONF_USART_1_OVER
+#define CONF_USART_1_OVER 0
+#endif
+
+// <o> Inhibit Non Ack
+// <0=>The NACK is generated
+// <1=>The NACK is not generated
+// <i> Inhibit Non Acknowledge
+// <id> usart__inack
+#ifndef CONF_USART_1_INACK
+#define CONF_USART_1_INACK 1
+#endif
+
+// <o> Disable Successive NACK
+// <0=>NACK is sent on the ISO line as soon as a parity error occurs
+// <1=>Many parity errors generate a NACK on the ISO line
+// <i> Disable Successive NACK
+// <id> usart_dsnack
+#ifndef CONF_USART_1_DSNACK
+#define CONF_USART_1_DSNACK 0
+#endif
+
+// <o> Inverted Data
+// <0=>Data isn't inverted, nomal mode
+// <1=>Data is inverted
+// <i> Inverted Data
+// <id> usart_invdata
+#ifndef CONF_USART_1_INVDATA
+#define CONF_USART_1_INVDATA 0
+#endif
+
+// <o> Maximum Number of Automatic Iteration <0-7>
+// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
+// <id> usart_max_iteration
+#ifndef CONF_USART_1_MAX_ITERATION
+#define CONF_USART_1_MAX_ITERATION 0
+#endif
+
+// <q> Receive Line Filter enable
+// <i> whether the USART filters the receive line using a three-sample filter
+// <id> usart_receive_filter_enable
+#ifndef CONF_USART_1_FILTER
+#define CONF_USART_1_FILTER 0
+#endif
+
+// <q> Manchester Encoder/Decoder Enable
+// <i> whether the USART Manchester Encoder/Decoder
+// <id> usart_manchester_filter_enable
+#ifndef CONF_USART_1_MAN
+#define CONF_USART_1_MAN 0
+#endif
+
+// <o> Manchester Synchronization Mode
+// <0=>The Manchester start bit is a 0 to 1 transition
+// <1=>The Manchester start bit is a 1 to 0 transition
+// <i> Manchester Synchronization Mode
+// <id> usart_manchester_synchronization_mode
+#ifndef CONF_USART_1_MODSYNC
+#define CONF_USART_1_MODSYNC 0
+#endif
+
+// <o> Start Frame Delimiter Selector
+// <0=>Start frame delimiter is COMMAND or DATA SYNC
+// <1=>Start frame delimiter is one bit
+// <i> Start Frame Delimiter Selector
+// <id> usart_start_frame_delimiter
+#ifndef CONF_USART_1_ONEBIT
+#define CONF_USART_1_ONEBIT 0
+#endif
+
+// <o> Fractional Part <0-7>
+// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
+// <id> usart_arch_fractional
+#ifndef CONF_USART_1_FRACTIONAL
+#define CONF_USART_1_FRACTIONAL 0x0
+#endif
+
+// <o> Data Order
+// <0=>LSB is transmitted first
+// <1=>MSB is transmitted first
+// <i> Data order of the data bits in the frame
+// <id> usart_arch_msbf
+#ifndef CONF_USART_1_MSBF
+#define CONF_USART_1_MSBF 0
+#endif
+
+// </e>
+
+#define CONF_USART_1_MODE 0x0
+
+// Calculate BAUD register value in UART mode
+#if CONF_USART1_CK_SRC < 3
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP                                                                                           \
+	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
+#endif
+#elif CONF_USART1_CK_SRC == 3
+// No division is active. The value written in US_BRGR has no effect.
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD 1
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP 1
+#endif
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // HPL_USART_CONFIG_H

third_party/tinyusb/hw/bsp/same7x/boards/same70_xplained/peripheral_clk_config.h

@@ -0,0 +1,126 @@
+/* Auto-generated config file peripheral_clk_config.h */
+#ifndef PERIPHERAL_CLK_CONFIG_H
+#define PERIPHERAL_CLK_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+/**
+ * \def CONF_HCLK_FREQUENCY
+ * \brief HCLK's Clock frequency
+ */
+#ifndef CONF_HCLK_FREQUENCY
+#define CONF_HCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_FCLK_FREQUENCY
+ * \brief FCLK's Clock frequency
+ */
+#ifndef CONF_FCLK_FREQUENCY
+#define CONF_FCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_CPU_FREQUENCY
+ * \brief CPU's Clock frequency
+ */
+#ifndef CONF_CPU_FREQUENCY
+#define CONF_CPU_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_SLCK_FREQUENCY
+ * \brief Slow Clock frequency
+ */
+#define CONF_SLCK_FREQUENCY 0
+
+/**
+ * \def CONF_MCK_FREQUENCY
+ * \brief Master Clock frequency
+ */
+#define CONF_MCK_FREQUENCY 150000000
+
+/**
+ * \def CONF_PCK6_FREQUENCY
+ * \brief Programmable Clock Controller 6 frequency
+ */
+#define CONF_PCK6_FREQUENCY 1714285
+
+// <h> USART Clock Settings
+// <o> USART Clock source
+
+// <0=> Master Clock (MCK)
+// <1=> MCK / 8 for USART
+// <2=> Programmable Clock Controller 4 (PMC_PCK4)
+// <3=> External Clock
+// <i> This defines the clock source for the USART
+// <id> usart_clock_source
+#ifndef CONF_USART1_CK_SRC
+#define CONF_USART1_CK_SRC 0
+#endif
+
+// <o> USART External Clock Input on SCK <1-4294967295>
+// <i> Inputs the external clock frequency on SCK
+// <id> usart_clock_freq
+#ifndef CONF_USART1_SCK_FREQ
+#define CONF_USART1_SCK_FREQ 10000000
+#endif
+
+// </h>
+
+/**
+ * \def USART FREQUENCY
+ * \brief USART's Clock frequency
+ */
+#ifndef CONF_USART1_FREQUENCY
+#define CONF_USART1_FREQUENCY 150000000
+#endif
+
+#ifndef CONF_SRC_USB_480M
+#define CONF_SRC_USB_480M 0
+#endif
+
+#ifndef CONF_SRC_USB_48M
+#define CONF_SRC_USB_48M 1
+#endif
+
+// <y> USB Full/Low Speed Clock
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_fsls_clock_source
+// <i> 48MHz clock source for low speed and full speed.
+// <i> It must be available when low speed is supported by host driver.
+// <i> It must be available when low power mode is selected.
+#ifndef CONF_USBHS_FSLS_SRC
+#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
+#endif
+
+// <y> USB Clock Source(Normal/Low-power Mode Selection)
+// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_clock_source
+// <i> Select the clock source for USB.
+// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
+// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
+#ifndef CONF_USBHS_SRC
+#define CONF_USBHS_SRC CONF_SRC_USB_480M
+#endif
+
+/**
+ * \def CONF_USBHS_FSLS_FREQUENCY
+ * \brief USBHS's Full/Low Speed Clock Source frequency
+ */
+#ifndef CONF_USBHS_FSLS_FREQUENCY
+#define CONF_USBHS_FSLS_FREQUENCY 48000000
+#endif
+
+/**
+ * \def CONF_USBHS_FREQUENCY
+ * \brief USBHS's Selected Clock Source frequency
+ */
+#ifndef CONF_USBHS_FREQUENCY
+#define CONF_USBHS_FREQUENCY 480000000
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // PERIPHERAL_CLK_CONFIG_H

third_party/tinyusb/hw/bsp/same7x/family.c

@@ -0,0 +1,190 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to do so, subject to the
+ * following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: Microchip
+*/
+
+#include "bsp/board_api.h"
+#include "sam.h"
+
+#include "hal/include/hal_gpio.h"
+#include "hal/include/hal_init.h"
+#include "hal/include/hal_usart_async.h"
+#include "hpl/pmc/hpl_pmc.h"
+#include "hpl/usart/hpl_usart_base.h"
+#include "peripheral_clk_config.h"
+
+static inline void board_vbus_set(uint8_t rhport, bool state);
+void _init(void);
+#include "board.h"
+
+#ifndef UART_BUFFER_SIZE
+  #define UART_BUFFER_SIZE 64
+#endif
+
+#define LED_STATE_OFF (1 - LED_STATE_ON)
+
+static struct usart_async_descriptor edbg_com;
+static uint8_t edbg_com_buffer[UART_BUFFER_SIZE];
+static volatile bool uart_busy = false;
+static void tx_complete_cb(const struct usart_async_descriptor *const io_descr) {
+  (void) io_descr;
+  uart_busy = false;
+}
+
+void board_init(void) {
+  init_mcu();
+
+  /* Disable Watchdog */
+  hri_wdt_set_MR_WDDIS_bit(WDT);
+
+#ifdef LED_PIN
+  _pmc_enable_periph_clock(LED_PORT_CLOCK);
+  gpio_set_pin_level(LED_PIN, LED_STATE_OFF);
+  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
+#endif
+
+#ifdef BUTTON_PIN
+  _pmc_enable_periph_clock(BUTTON_PORT_CLOCK);
+  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
+  gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
+#endif
+
+  _pmc_enable_periph_clock(UART_PORT_CLOCK);
+  gpio_set_pin_function(UART_RX_PIN, UART_RX_FUNCTION);
+  gpio_set_pin_function(UART_TX_PIN, UART_TX_FUNCTION);
+
+  usart_async_init(&edbg_com, BOARD_USART, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
+  usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
+  usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_complete_cb);
+  usart_async_enable(&edbg_com);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer (SystemCoreClock may not be correct after init)
+  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority((IRQn_Type) ID_USBHS, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+  // Enable USB clock
+  _pmc_enable_periph_clock(ID_USBHS);
+
+#if CFG_TUH_ENABLED
+  board_vbus_set(0, true);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// USB Interrupt Handler
+//--------------------------------------------------------------------+
+void USBHS_Handler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#ifdef LED_PIN
+  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
+#else
+  (void) state;
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
+#else
+  return 0;
+#endif
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return -1;
+}
+
+int board_uart_write(void const *buf, int len) {
+  while (uart_busy) {}
+  uart_busy = true;
+
+  io_write(&edbg_com.io, buf, len);
+  return len;
+}
+
+// Read 128-bit unique ID via EFC STUI/SPUI commands
+// Must run from RAM since STUI remaps flash to the unique ID
+__attribute__((noinline)) TU_ATTR_SECTION(.ramfunc) static void read_unique_id(uint32_t uid[4]) {
+  // Wait for flash to be ready
+  while (!(EFC->EEFC_FSR & EEFC_FSR_FRDY)) {}
+
+  // Issue Start Read Unique Identifier command
+  EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FCMD_STUI;
+  while (EFC->EEFC_FSR & EEFC_FSR_FRDY) {}
+
+  // Read 128-bit unique ID from flash base address
+  const volatile uint32_t *flash = (const volatile uint32_t *) IFLASH_ADDR;
+  for (int i = 0; i < 4; i++) {
+    uid[i] = flash[i];
+  }
+
+  // Issue Stop Read Unique Identifier command
+  EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FCMD_SPUI;
+  while (!(EFC->EEFC_FSR & EEFC_FSR_FRDY)) {}
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  const size_t uid_len = 16;
+  if (max_len < uid_len) {
+    return 0;
+  }
+  read_unique_id((uint32_t *)(uintptr_t) id);
+  return uid_len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t tusb_time_millis_api(void) {
+  return system_ticks;
+}
+#endif
+
+void _init(void) {
+}

third_party/tinyusb/hw/bsp/same7x/family.cmake

@@ -0,0 +1,98 @@
+include_guard()
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/microchip/same70)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m7 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMX7X CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/same70b/gcc/system_same70q21b.c
+    ${SDK_DIR}/hpl/core/hpl_init.c
+    ${SDK_DIR}/hpl/usart/hpl_usart.c
+    ${SDK_DIR}/hpl/pmc/hpl_pmc.c
+    ${SDK_DIR}/hal/src/hal_usart_async.c
+    ${SDK_DIR}/hal/src/hal_io.c
+    ${SDK_DIR}/hal/src/hal_atomic.c
+    ${SDK_DIR}/hal/utils/src/utils_ringbuffer.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}
+    ${SDK_DIR}/config
+    ${SDK_DIR}/same70b/include
+    ${SDK_DIR}/hal/include
+    ${SDK_DIR}/hal/utils/include
+    ${SDK_DIR}/hpl/core
+    ${SDK_DIR}/hpl/pio
+    ${SDK_DIR}/hpl/pmc
+    ${SDK_DIR}/hri
+    ${SDK_DIR}/CMSIS/Core/Include
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
+    set_target_properties(${BOARD_TARGET} PROPERTIES COMPILE_FLAGS -Wno-error=cast-qual)
+  endif ()
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMX7X)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/microchip/samx7x/dcd_samx7x.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    # ignore hal error
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      PROPERTIES
+      SKIP_LINTING ON
+      COMPILE_OPTIONS -w)
+  endif()
+
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()

third_party/tinyusb/hw/bsp/same7x/family.mk

@@ -0,0 +1,51 @@
+SDK_DIR = hw/mcu/microchip/same70
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m7
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m7 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
+
+# suppress following warnings from mcu driver
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slows down compilation significantly
+CFLAGS_SKIP += -Wcast-qual
+
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
+
+# All source paths should be relative to the top level.
+SRC_C += \
+	src/portable/microchip/samx7x/dcd_samx7x.c \
+	$(STARTUP_FILE) \
+	$(SDK_DIR)/same70b/gcc/system_same70q21b.c \
+	$(SDK_DIR)/hpl/core/hpl_init.c \
+	$(SDK_DIR)/hpl/usart/hpl_usart.c \
+	$(SDK_DIR)/hpl/pmc/hpl_pmc.c \
+	$(SDK_DIR)/hal/src/hal_usart_async.c \
+	$(SDK_DIR)/hal/src/hal_io.c \
+	$(SDK_DIR)/hal/src/hal_atomic.c \
+	$(SDK_DIR)/hal/utils/src/utils_ringbuffer.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_DIR) \
+	$(TOP)/$(SDK_DIR)/config \
+	$(TOP)/$(SDK_DIR)/same70b/include \
+	$(TOP)/$(SDK_DIR)/hal/include \
+	$(TOP)/$(SDK_DIR)/hal/utils/include \
+	$(TOP)/$(SDK_DIR)/hpl/core \
+	$(TOP)/$(SDK_DIR)/hpl/pio \
+	$(TOP)/$(SDK_DIR)/hpl/pmc \
+	$(TOP)/$(SDK_DIR)/hri \
+	$(TOP)/$(SDK_DIR)/CMSIS/Core/Include
+
+# For flash-jlink target
+flash: $(BUILD)/$(PROJECT).bin
+	edbg --verbose -t same70 -pv -f $<