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@@ -0,0 +1,165 @@
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/*
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* FreeRTOS Kernel V10.0.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
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||||
*
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||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
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||||
* http://www.FreeRTOS.org
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||||
* http://aws.amazon.com/freertos
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*
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||||
* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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||||
*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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// skip if included from IAR assembler
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#ifndef __IASMARM__
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#include "stm32c5xx.h"
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#endif
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/* Cortex M23/M33 port configuration. */
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#define configENABLE_MPU 0
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#define configENABLE_FPU 1
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#define configENABLE_TRUSTZONE 0
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#define configMINIMAL_SECURE_STACK_SIZE (1024)
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#define configUSE_PREEMPTION 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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#define configCPU_CLOCK_HZ SystemCoreClock
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#define configTICK_RATE_HZ ( 1000 )
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( 200 )
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#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
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#define configMAX_TASK_NAME_LEN 16
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 4
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#define configUSE_QUEUE_SETS 0
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 0
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/* Hook function related definitions. */
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configRECORD_STACK_HIGH_ADDRESS 1
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#define configUSE_TRACE_FACILITY 1 // legacy trace
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES 2
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/* Software timer related definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
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#define configTIMER_QUEUE_LENGTH 32
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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/* Optional functions - most linkers will remove unused functions anyway. */
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#define INCLUDE_vTaskPrioritySet 0
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#define INCLUDE_uxTaskPriorityGet 0
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#define INCLUDE_vTaskDelete 0
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#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
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#define INCLUDE_xResumeFromISR 0
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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||||
#define INCLUDE_xTaskGetSchedulerState 0
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#define INCLUDE_xTaskGetCurrentTaskHandle 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 0
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#define INCLUDE_xTaskGetIdleTaskHandle 0
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#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
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#define INCLUDE_pcTaskGetTaskName 0
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#define INCLUDE_eTaskGetState 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
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defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define vPortSVCHandler SVC_Handler
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//--------------------------------------------------------------------+
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// Interrupt nesting behavior configuration.
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//--------------------------------------------------------------------+
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// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
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#define configPRIO_BITS 4
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/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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#endif
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@@ -0,0 +1,13 @@
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set(MCU_VARIANT stm32c542xx)
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set(JLINK_DEVICE stm32c542rc)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/stm32c542xc_flash.ld)
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set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/../../linker/stm32c542xc_flash.icf)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32C542xx
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HSE_VALUE=24000000
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HSE_STARTUP_TIMEOUT=100
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)
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endfunction()
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@@ -0,0 +1,83 @@
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||||
/*
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||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2026, HiFiPhile
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
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/* metadata:
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name: STM32C542 Nucleo
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||||
url: https://www.st.com/en/evaluation-tools/nucleo-c542rc.html
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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// LED
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#define LED_PORT HAL_GPIOA
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#define LED_PIN HAL_GPIO_PIN_5
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// Button
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#define BUTTON_PORT HAL_GPIOC
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#define BUTTON_PIN HAL_GPIO_PIN_13
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#define BUTTON_STATE_ACTIVE 1
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// Enable UART serial communication with the ST-Link
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#define UART_ID 2
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#define UART_GPIO_PORT HAL_GPIOA
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#define UART_GPIO_AF HAL_GPIO_AF_7
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#define UART_TX_PIN HAL_GPIO_PIN_2
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#define UART_RX_PIN HAL_GPIO_PIN_3
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static inline void board_clock_init(void) {
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HAL_RCC_HSE_Enable(HAL_RCC_HSE_ON);
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hal_rcc_psi_config_t config_psi;
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config_psi.psi_source = HAL_RCC_PSI_SRC_HSE;
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config_psi.psi_ref = HAL_RCC_PSI_REF_24MHZ;
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config_psi.psi_out = HAL_RCC_PSI_OUT_144MHZ;
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HAL_RCC_PSI_SetConfig(&config_psi);
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HAL_RCC_PSIS_Enable();
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/** Initializes the CPU, AHB and APB busses clocks */
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hal_rcc_bus_clk_config_t config_bus;
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config_bus.hclk_prescaler = HAL_RCC_HCLK_PRESCALER1;
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config_bus.pclk1_prescaler = HAL_RCC_PCLK_PRESCALER1;
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config_bus.pclk2_prescaler = HAL_RCC_PCLK_PRESCALER1;
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config_bus.pclk3_prescaler = HAL_RCC_PCLK_PRESCALER1;
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HAL_RCC_SetBusClockConfig(&config_bus);
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/** Frequency will be increased */
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HAL_FLASH_ITF_SetLatency(HAL_FLASH, HAL_FLASH_ITF_LATENCY_4);
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HAL_RCC_SetSYSCLKSource(HAL_RCC_SYSCLK_SRC_PSIS);
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HAL_FLASH_ITF_SetProgrammingDelay(HAL_FLASH, HAL_FLASH_ITF_PROGRAM_DELAY_2);
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HAL_UpdateCoreClock();
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HAL_RCC_USART2_SetKernelClkSource(HAL_RCC_USART2_CLK_SRC_PCLK1);
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HAL_RCC_PSIDIV3_Enable();
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HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_PSIDIV3);
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}
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#endif /* BOARD_H_ */
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@@ -0,0 +1,13 @@
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MCU_VARIANT = stm32c542xx
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CFLAGS += \
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-DSTM32C542xx \
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-DHSE_VALUE=24000000 \
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-DHSE_STARTUP_TIMEOUT=100
|
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||||
# GCC
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LD_FILE = $(FAMILY_PATH)/linker/stm32c542xc_flash.ld
|
||||
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = stm32c542rc
|
||||
+250
@@ -0,0 +1,250 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
* Copyright (c) 2023 HiFiPhile
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* metadata:
|
||||
manufacturer: STMicroelectronics
|
||||
*/
|
||||
|
||||
#include "stm32_hal.h"
|
||||
#include "bsp/board_api.h"
|
||||
#include "board.h"
|
||||
|
||||
#ifdef UART_ID
|
||||
#if UART_ID == 1
|
||||
#define UARTn USART1
|
||||
#define UARTn_CLK_ENABLE HAL_RCC_USART1_EnableClock
|
||||
#elif UART_ID == 2
|
||||
#define UARTn USART2
|
||||
#define UARTn_CLK_ENABLE HAL_RCC_USART2_EnableClock
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB_DRD_FS_IRQHandler(void) {
|
||||
tusb_int_handler(0, true);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM
|
||||
//--------------------------------------------------------------------+
|
||||
static void mpu_init(void);
|
||||
|
||||
void board_init(void) {
|
||||
mpu_init();
|
||||
LL_ICACHE_Enable(ICACHE);
|
||||
|
||||
HAL_Init();
|
||||
board_clock_init();
|
||||
|
||||
// Enable peripheral clocks.
|
||||
HAL_RCC_GPIOA_EnableClock();
|
||||
HAL_RCC_GPIOB_EnableClock();
|
||||
HAL_RCC_GPIOC_EnableClock();
|
||||
HAL_RCC_GPIOD_EnableClock();
|
||||
HAL_RCC_USB_EnableClock();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// Explicitly disable systick to prevent its ISR from running before scheduler start
|
||||
SysTick->CTRL &= ~1U;
|
||||
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
#endif
|
||||
|
||||
// LED
|
||||
{
|
||||
hal_gpio_config_t gpio_config;
|
||||
gpio_config.mode = HAL_GPIO_MODE_OUTPUT;
|
||||
gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
|
||||
gpio_config.pull = HAL_GPIO_PULL_NO;
|
||||
gpio_config.output_type = HAL_GPIO_OUTPUT_PUSHPULL;
|
||||
gpio_config.init_state = HAL_GPIO_PIN_RESET;
|
||||
|
||||
HAL_GPIO_Init(LED_PORT, LED_PIN, &gpio_config);
|
||||
}
|
||||
|
||||
// Button
|
||||
{
|
||||
hal_gpio_config_t gpio_config;
|
||||
gpio_config.mode = HAL_GPIO_MODE_INPUT;
|
||||
gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
|
||||
gpio_config.pull = BUTTON_STATE_ACTIVE ? HAL_GPIO_PULL_DOWN : HAL_GPIO_PULL_UP;
|
||||
HAL_GPIO_Init(BUTTON_PORT, BUTTON_PIN, &gpio_config);
|
||||
}
|
||||
|
||||
#ifdef UART_ID
|
||||
UARTn_CLK_ENABLE();
|
||||
// UART
|
||||
{
|
||||
hal_gpio_config_t gpio_config;
|
||||
gpio_config.mode = HAL_GPIO_MODE_ALTERNATE;
|
||||
gpio_config.output_type = HAL_GPIO_OUTPUT_PUSHPULL;
|
||||
gpio_config.pull = HAL_GPIO_PULL_NO;
|
||||
gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
|
||||
gpio_config.alternate = UART_GPIO_AF;
|
||||
HAL_GPIO_Init(UART_GPIO_PORT, UART_TX_PIN | UART_RX_PIN, &gpio_config);
|
||||
}
|
||||
|
||||
LL_USART_ConfigAsyncMode(UARTn);
|
||||
uint32_t reg_temp = (LL_USART_DATAWIDTH_8_BIT | LL_USART_PARITY_NONE
|
||||
| LL_USART_DIRECTION_TX_RX | LL_USART_OVERSAMPLING_16);
|
||||
LL_USART_ConfigXfer(UARTn, reg_temp, LL_USART_STOP_BIT_1);
|
||||
LL_USART_SetBaudRate(UARTn, SystemCoreClock, LL_USART_PRESCALER_DIV1, LL_USART_OVERSAMPLING_16,
|
||||
115200);
|
||||
LL_USART_EnableFIFO(UARTn);
|
||||
LL_USART_Enable(UARTn);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void mpu_init(void)
|
||||
{
|
||||
/* Disables the MPU */
|
||||
HAL_CORTEX_MPU_Disable();
|
||||
|
||||
/*
|
||||
Initializes and configures the MPU attributes
|
||||
*/
|
||||
HAL_CORTEX_MPU_SetCacheMemAttr(HAL_CORTEX_MPU_MEM_ATTR_0, HAL_CORTEX_MPU_NORMAL_MEM_NCACHEABLE);
|
||||
|
||||
/*
|
||||
Initializes and configures the MPU Region
|
||||
*/
|
||||
hal_cortex_mpu_region_config_t p_region_config = {0};
|
||||
|
||||
p_region_config.base_addr = 0x8FFE000;
|
||||
p_region_config.limit_addr = 0x8FFFFFF;
|
||||
p_region_config.access_attr = HAL_CORTEX_MPU_REGION_ALL_RO;
|
||||
p_region_config.exec_attr = HAL_CORTEX_MPU_EXECUTION_ATTR_DISABLE;
|
||||
p_region_config.attr_idx = HAL_CORTEX_MPU_MEM_ATTR_0;
|
||||
HAL_CORTEX_MPU_SetConfigRegion(HAL_CORTEX_MPU_REGION_0, &p_region_config);
|
||||
|
||||
HAL_CORTEX_MPU_EnableRegion(HAL_CORTEX_MPU_REGION_0);
|
||||
|
||||
/* Enables the MPU */
|
||||
HAL_CORTEX_MPU_Enable(HAL_CORTEX_MPU_HARDFAULT_NMI_DISABLE, HAL_CORTEX_MPU_ACCESS_FAULT_ONLY_PRIV);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state) {
|
||||
hal_gpio_pin_state_t pin_state = state ? HAL_GPIO_PIN_SET : HAL_GPIO_PIN_RESET;
|
||||
HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void) {
|
||||
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
|
||||
(void) max_len;
|
||||
volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
|
||||
uint32_t* id32 = (uint32_t*) (uintptr_t) id;
|
||||
uint8_t const len = 12;
|
||||
|
||||
id32[0] = stm32_uuid[0];
|
||||
id32[1] = stm32_uuid[1];
|
||||
id32[2] = stm32_uuid[2];
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t *buf, int len) {
|
||||
#ifdef UART_ID
|
||||
int count = 0;
|
||||
while (count < len) {
|
||||
if (LL_USART_IsActiveFlag_RXNE_RXFNE(UARTn)) {
|
||||
buf[count] = LL_USART_ReceiveData8(UARTn);
|
||||
count++;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return count;
|
||||
#else
|
||||
(void) buf; (void) len;
|
||||
return -1;
|
||||
#endif
|
||||
}
|
||||
|
||||
int board_uart_write(void const *buf, int len) {
|
||||
#ifdef UART_ID
|
||||
const uint8_t *p = (const uint8_t *) buf;
|
||||
int count = 0;
|
||||
while (count < len) {
|
||||
if (LL_USART_IsActiveFlag_TXE_TXFNF(UARTn)) {
|
||||
LL_USART_TransmitData8(UARTn, p[count]);
|
||||
count++;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return count;
|
||||
#else
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler(void) {
|
||||
system_ticks++;
|
||||
HAL_IncTick();
|
||||
}
|
||||
|
||||
uint32_t tusb_time_millis_api(void) {
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
void HardFault_Handler(void) {
|
||||
__asm("BKPT #0\n");
|
||||
}
|
||||
|
||||
#ifndef __ICCARM__
|
||||
// Implement _start() since we use linker flag '-nostartfiles'.
|
||||
extern int main(void);
|
||||
TU_ATTR_UNUSED void _start(void) {
|
||||
// called by startup code
|
||||
main();
|
||||
while (1) {}
|
||||
}
|
||||
#endif
|
||||
|
||||
// Required by __libc_init_array in startup code if we are compiling using
|
||||
// -nostdlib/-nostartfiles.
|
||||
void _init(void) {
|
||||
|
||||
}
|
||||
+111
@@ -0,0 +1,111 @@
|
||||
include_guard()
|
||||
|
||||
set(ST_FAMILY c5)
|
||||
set(ST_PREFIX stm32${ST_FAMILY}xx)
|
||||
|
||||
set(ST_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx-drivers)
|
||||
set(ST_CMSIS ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx-dfp)
|
||||
set(CMSIS_6 ${TOP}/lib/CMSIS_6)
|
||||
|
||||
# include board specific
|
||||
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||
|
||||
# toolchain set up
|
||||
set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
|
||||
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
|
||||
|
||||
set(FAMILY_MCUS STM32C5 CACHE INTERNAL "")
|
||||
set(OPENOCD_OPTION "-f interface/stlink.cfg -f target/stm32c5x.cfg")
|
||||
|
||||
#------------------------------------
|
||||
# Startup & Linker script
|
||||
#------------------------------------
|
||||
set(STARTUP_FILE ${ST_CMSIS}/Source/startup_${MCU_VARIANT}.c)
|
||||
set(LD_FILE_Clang ${LD_FILE_GNU})
|
||||
|
||||
#------------------------------------
|
||||
# BOARD_TARGET
|
||||
#------------------------------------
|
||||
function(family_add_board BOARD_TARGET)
|
||||
add_library(${BOARD_TARGET} STATIC
|
||||
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_cortex.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_flash_itf.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_pwr.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_rcc.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_gpio.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_uart.c
|
||||
${ST_DRIVER}/hal/${ST_PREFIX}_hal_dma.c
|
||||
)
|
||||
target_include_directories(${BOARD_TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${CMSIS_6}/CMSIS/Core/Include
|
||||
${ST_CMSIS}/Include
|
||||
${ST_DRIVER}/hal
|
||||
${ST_DRIVER}/ll
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
)
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
||||
target_compile_options(${BOARD_TARGET} PUBLIC -Wno-redundant-decls)
|
||||
endif ()
|
||||
|
||||
if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
__STACK_LIMIT=__StackLimit
|
||||
__INITIAL_SP=__StackTop
|
||||
)
|
||||
endif ()
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
endfunction()
|
||||
|
||||
#------------------------------------
|
||||
# Functions
|
||||
#------------------------------------
|
||||
function(family_configure_example TARGET RTOS)
|
||||
family_configure_common(${TARGET} ${RTOS})
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_STM32C5)
|
||||
|
||||
target_sources(${TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
|
||||
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
|
||||
${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
|
||||
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
|
||||
${STARTUP_FILE}
|
||||
)
|
||||
target_include_directories(${TARGET} PUBLIC
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||
)
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
target_link_options(${TARGET} PUBLIC
|
||||
"LINKER:--script=${LD_FILE_GNU}"
|
||||
-nostartfiles
|
||||
--specs=nosys.specs --specs=nano.specs
|
||||
)
|
||||
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
||||
target_link_options(${TARGET} PUBLIC
|
||||
"LINKER:--script=${LD_FILE_Clang}"
|
||||
)
|
||||
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
|
||||
target_link_options(${TARGET} PUBLIC
|
||||
"LINKER:--config=${LD_FILE_IAR}"
|
||||
)
|
||||
endif ()
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
||||
set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
|
||||
endif ()
|
||||
|
||||
# Flashing
|
||||
family_add_bin_hex(${TARGET})
|
||||
family_flash_jlink(${TARGET})
|
||||
family_flash_stlink(${TARGET})
|
||||
#family_flash_openocd(${TARGET})
|
||||
endfunction()
|
||||
+52
@@ -0,0 +1,52 @@
|
||||
ST_FAMILY = c5
|
||||
ST_CMSIS = hw/mcu/st/stm32$(ST_FAMILY)xx-dfp
|
||||
ST_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx-drivers
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
CPU_CORE ?= cortex-m33
|
||||
|
||||
# --------------
|
||||
# Compiler Flags
|
||||
# --------------
|
||||
CFLAGS += \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_STM32C5 \
|
||||
|
||||
# GCC Flags
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
|
||||
# suppress warnings caused by vendor mcu driver
|
||||
CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter -Wno-error=redundant-decls
|
||||
|
||||
LDFLAGS += \
|
||||
-nostdlib -nostartfiles \
|
||||
--specs=nosys.specs --specs=nano.specs
|
||||
|
||||
# -----------------
|
||||
# Sources & Include
|
||||
# -----------------
|
||||
|
||||
SRC_C += \
|
||||
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
|
||||
src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
|
||||
src/portable/st/stm32_fsdev/fsdev_common.c \
|
||||
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
|
||||
$(ST_CMSIS)/Source/startup_$(MCU_VARIANT).c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_cortex.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_flash_itf.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_pwr.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_rcc.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_gpio.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_uart.c \
|
||||
$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_dma.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
|
||||
$(TOP)/$(ST_CMSIS)/Include \
|
||||
$(TOP)/$(ST_DRIVER)/hal \
|
||||
$(TOP)/$(ST_DRIVER)/ll
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: flash-stlink
|
||||
@@ -0,0 +1,46 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32c542xc_flash.icf
|
||||
* @brief Linker File
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM = mem:[from 0x8000000 size 0x40000];
|
||||
define region RAM = mem:[from 0x20000000 size 0x10000];
|
||||
|
||||
/* define blocks */
|
||||
define block HEAP with alignment = 8, size = 0x200 { };
|
||||
define block CSTACK with alignment = 8, size = 0x1000 { };
|
||||
|
||||
/* setup initialization strategies */
|
||||
initialize by copy {
|
||||
readwrite
|
||||
};
|
||||
|
||||
do not initialize {
|
||||
section .noinit
|
||||
};
|
||||
|
||||
place at start of ROM { readonly section .intvec } ;
|
||||
|
||||
/* sections placements */
|
||||
place in ROM {
|
||||
readonly
|
||||
};
|
||||
|
||||
place in RAM {
|
||||
readwrite,
|
||||
block HEAP,
|
||||
block CSTACK
|
||||
};
|
||||
@@ -0,0 +1,185 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32c542xc_flash.ld
|
||||
* @brief Linker File
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
HEAP_SIZE = 0x200;
|
||||
STACK_SIZE = 0x1000;
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : org = 0x8000000, len = 0x40000
|
||||
RAM (xrw) : org = 0x20000000, len = 0x10000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vectors :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.vectors));
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text);
|
||||
*(.text*);
|
||||
*(.glue_7);
|
||||
*(.glue_7t);
|
||||
*(.eh_frame);
|
||||
KEEP (*(.init));
|
||||
KEEP (*(.fini));
|
||||
. = ALIGN(8);
|
||||
_etext = .;
|
||||
} > ROM
|
||||
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata);
|
||||
*(.rodata*);
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.ARM.extab : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.ARM : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*);
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.preinit_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*));
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.init_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)));
|
||||
KEEP (*(.init_array*));
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.fini_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)));
|
||||
KEEP (*(.fini_array*));
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} > ROM
|
||||
|
||||
.copy.table : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__copy_table_start__ = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG (ADDR(.data));
|
||||
LONG (SIZEOF(.data) / 4);
|
||||
__copy_table_end__ = .;
|
||||
} > ROM
|
||||
|
||||
.zero.table : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__zero_table_start__ = .;
|
||||
LONG (ADDR(.bss));
|
||||
LONG (SIZEOF(.bss) / 4);
|
||||
__zero_table_end__ = .;
|
||||
} > ROM
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sidata = LOADADDR(.data);
|
||||
__data_start__ = .;
|
||||
_sdata = .;
|
||||
*(.data);
|
||||
*(.data*);
|
||||
. = ALIGN(8);
|
||||
_edata = .;
|
||||
} > RAM AT> ROM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sbss = .;
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss);
|
||||
*(.bss*);
|
||||
*(COMMON);
|
||||
. = ALIGN(8);
|
||||
_ebss = .;
|
||||
__bss_end__ = _ebss;
|
||||
} > RAM
|
||||
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__end__ = .;
|
||||
PROVIDE (end = .);
|
||||
_heap_start = .;
|
||||
. += HEAP_SIZE;
|
||||
. = ALIGN(8);
|
||||
_heap_end = .;
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
.stack (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__StackLimit = .;
|
||||
. += STACK_SIZE;
|
||||
. = ALIGN(8);
|
||||
__StackTop = .;
|
||||
_estack = .;
|
||||
__stack = .;
|
||||
} > RAM
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 :
|
||||
{
|
||||
*(.ARM.attributes)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,684 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32c5xx_hal_conf.h
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the mx_stm32c5xx_hal_drivers_license.md file
|
||||
* in the same directory as the generated code.
|
||||
* If no mx_stm32c5xx_hal_drivers_license.md file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32C5XX_HAL_CONF_H
|
||||
#define STM32C5XX_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup HAL_Conf_How_To_Use HAL Conf How to Use
|
||||
* @{
|
||||
- The STM32 HAL configuration file, stm32tnxx_hal_conf.h, is designed to customize the behaviour of the HAL modules.
|
||||
- The users can utilize the provided file as-is, where all HAL modules are enabled with their default settings.
|
||||
- Alternatively, users have the flexibility to customize the file based on their application's requirements.
|
||||
- For example, they can enable only the necessary HAL modules or modify the predefined settings to achieve
|
||||
the desired functionality.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_Conf_Exported_Constants HAL Conf Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_System_Configuration HAL System Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* ########################### System Configuration ############################# */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define USE_HAL_TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
|
||||
#define USE_HAL_FLASH_PREFETCH 1U /*!< Enable FLASH prefetch */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_MUTEX_Usage_Activation HAL MUTEX Usage Activation
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL MUTEX usage activation ####################### */
|
||||
/**
|
||||
* @brief Used by the HAL PPP Acquire/Release APIs when the define USE_HAL_MUTEX is set to 1
|
||||
*/
|
||||
#define USE_HAL_MUTEX 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_API_Parameters_Check HAL API Parameters Check
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL API parameters check ##################### */
|
||||
/**
|
||||
* @brief Run time parameter check activation
|
||||
*/
|
||||
#define USE_HAL_CHECK_PARAM 0U
|
||||
#define USE_HAL_SECURE_CHECK_PARAM 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_State_Transition HAL State Transition
|
||||
* @{
|
||||
*/
|
||||
/* ########################## State transition ################################ */
|
||||
/**
|
||||
* @brief Enable protection of state transition in thread safe
|
||||
*/
|
||||
#define USE_HAL_CHECK_PROCESS_STATE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* ########################## Peripheral configuration ######################### */
|
||||
|
||||
/** @defgroup HAL_ADC_Config HAL ADC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_ADC Config #################################### */
|
||||
#define USE_HAL_ADC_MODULE 0U
|
||||
#define USE_HAL_ADC_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_ADC_USER_DATA 0U
|
||||
#define USE_HAL_ADC_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_ADC_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_AES_Config HAL AES Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_AES Config #################################### */
|
||||
#define USE_HAL_AES_MODULE 0U
|
||||
#define USE_HAL_AES_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_AES_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_AES_USER_DATA 0U
|
||||
#define USE_HAL_AES_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_AES_DMA 0U
|
||||
#define USE_HAL_AES_ECB_CBC_ALGO 0U
|
||||
#define USE_HAL_AES_CTR_ALGO 0U
|
||||
#define USE_HAL_AES_GCM_GMAC_ALGO 0U
|
||||
#define USE_HAL_AES_CCM_ALGO 0U
|
||||
#define USE_HAL_AES_SUSPEND_RESUME 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CCB_Config HAL CCB Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_CCB Config #################################### */
|
||||
#define USE_HAL_CCB_MODULE 0U
|
||||
#define USE_HAL_CCB_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_CCB_USER_DATA 0U
|
||||
#define USE_HAL_CCB_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_COMP_Config HAL COMP Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_COMP Config ################################### */
|
||||
#define USE_HAL_COMP_MODULE 0U
|
||||
#define USE_HAL_COMP_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_COMP_USER_DATA 0U
|
||||
/* Use comparator with EXTI (needed to generate system wake-up event and CPU event) */
|
||||
#define USE_HAL_COMP_EXTI 0U
|
||||
/* Use comparators window mode feature */
|
||||
#define USE_HAL_COMP_WINDOW_MODE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CORDIC_Config HAL CORDIC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_CORDIC Config ################################# */
|
||||
#define USE_HAL_CORDIC_MODULE 0U
|
||||
#define USE_HAL_CORDIC_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CORDIC_USER_DATA 0U
|
||||
#define USE_HAL_CORDIC_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_CORDIC_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CORTEX_Config HAL CORTEX Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_CORTEX Config ################################# */
|
||||
#define USE_HAL_CORTEX_MODULE 1U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CRC_Config HAL CRC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_CRC Config #################################### */
|
||||
#define USE_HAL_CRC_MODULE 0U
|
||||
#define USE_HAL_CRC_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_CRC_USER_DATA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CRS_Config HAL CRS Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_CRS Config #################################### */
|
||||
#define USE_HAL_CRS_MODULE 0U
|
||||
#define USE_HAL_CRS_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_CRS_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CRS_USER_DATA 0U
|
||||
#define USE_HAL_CRS_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_DAC_Config HAL DAC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_DAC Config #################################### */
|
||||
#define USE_HAL_DAC_MODULE 0U
|
||||
#define USE_HAL_DAC_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DAC_USER_DATA 0U
|
||||
#define USE_HAL_DAC_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_DAC_DMA 0U
|
||||
#define USE_HAL_DAC_DUAL_CHANNEL 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_DBGMCU_Config HAL DBGMCU Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_DBGMCU Config ################################# */
|
||||
#define USE_HAL_DBGMCU_MODULE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_DMA_Config HAL DMA Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_DMA Config #################################### */
|
||||
#define USE_HAL_DMA_MODULE 1U
|
||||
#define USE_HAL_DMA_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_DMA_USER_DATA 0U
|
||||
#define USE_HAL_DMA_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_DMA_LINKEDLIST 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_ETH_Config HAL ETH Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_ETH Config #################################### */
|
||||
#define USE_HAL_ETH_MODULE 0U
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_ETH_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_ETH_USER_DATA 0U
|
||||
#define USE_HAL_ETH_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_ETH_ATOMIC_CHANNEL_LOCK 0U
|
||||
#define USE_HAL_ETH_MAX_TX_CH_NB 1U
|
||||
#define USE_HAL_ETH_MAX_RX_CH_NB 1U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_EXTI_Config HAL EXTI Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_EXTI Config ################################### */
|
||||
#define USE_HAL_EXTI_MODULE 0U
|
||||
#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_EXTI_USER_DATA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_FDCAN_Config HAL FDCAN Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_FDCAN Config ################################## */
|
||||
#define USE_HAL_FDCAN_MODULE 0U
|
||||
#define USE_HAL_FDCAN_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_FDCAN_USER_DATA 0U
|
||||
#define USE_HAL_FDCAN_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_FLASH_Config HAL FLASH Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_FLASH Config ################################## */
|
||||
#define USE_HAL_FLASH_MODULE 1U
|
||||
#define USE_HAL_FLASH_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_FLASH_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_FLASH_USER_DATA 0U
|
||||
#define USE_HAL_FLASH_GET_LAST_ERRORS 0U
|
||||
/* Use the FLASH program by address feature */
|
||||
#define USE_HAL_FLASH_PROGRAM_BY_ADDR 0U
|
||||
/* Use the FLASH erase by address feature */
|
||||
#define USE_HAL_FLASH_ERASE_BY_ADDR 0U
|
||||
/* Use the FLASH erase by PAGE feature */
|
||||
#define USE_HAL_FLASH_ERASE_PAGE 0U
|
||||
/* Use the FLASH bank erase feature */
|
||||
#define USE_HAL_FLASH_ERASE_BANK 0U
|
||||
/* Use the FLASH mass erase feature */
|
||||
#define USE_HAL_FLASH_MASS_ERASE 0U
|
||||
/* Use ECC errors handling APIs */
|
||||
#define USE_HAL_FLASH_ECC 0U
|
||||
/* Use FLASH HAL API for EDATA */
|
||||
#define USE_HAL_FLASH_OB_EDATA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_GPIO_Config HAL GPIO Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_GPIO Config ################################### */
|
||||
#define USE_HAL_GPIO_MODULE 1U
|
||||
#define USE_HAL_GPIO_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_HASH_Config HAL HASH Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_HASH Config ################################### */
|
||||
#define USE_HAL_HASH_MODULE 0U
|
||||
#define USE_HAL_HASH_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_HASH_USER_DATA 0U
|
||||
#define USE_HAL_HASH_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_HASH_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_HCD_Config HAL HCD Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_HCD Config #################################### */
|
||||
#define USE_HAL_HCD_MODULE 0U
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_HCD_USER_DATA 0U
|
||||
#define USE_HAL_HCD_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_HCD_USB_DOUBLE_BUFFER 0U
|
||||
#define USE_HAL_HCD_USB_EP_TYPE_ISOC 0U
|
||||
#define USE_HAL_HCD_MAX_CHANNEL_NB 16U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_I2C_Config HAL I2C Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_I2C Config #################################### */
|
||||
#define USE_HAL_I2C_MODULE 0U
|
||||
#define USE_HAL_I2C_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2C_USER_DATA 0U
|
||||
#define USE_HAL_I2C_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_I2C_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_I3C_Config HAL I3C Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_I3C Config #################################### */
|
||||
#define USE_HAL_I3C_MODULE 0U
|
||||
#define USE_HAL_I3C_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_I3C_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I3C_USER_DATA 0U
|
||||
#define USE_HAL_I3C_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_I3C_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_I2S_Config HAL I2S Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_I2S Config #################################### */
|
||||
#define USE_HAL_I2S_MODULE 0U
|
||||
#define USE_HAL_I2S_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2S_USER_DATA 0U
|
||||
#define USE_HAL_I2S_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_I2S_OVR_UDR_ERRORS 0U
|
||||
#define USE_HAL_I2S_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_ICACHE_Config HAL ICACHE Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_ICACHE Config ################################# */
|
||||
#define USE_HAL_ICACHE_MODULE 1U
|
||||
#define USE_HAL_ICACHE_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_ICACHE_USER_DATA 0U
|
||||
#define USE_HAL_ICACHE_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_IWDG_Config HAL IWDG Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_IWDG Config ################################### */
|
||||
#define USE_HAL_IWDG_MODULE 0U
|
||||
#define USE_HAL_IWDG_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_IWDG_USER_DATA 0U
|
||||
/* IWDG time unit configuration */
|
||||
#define USE_HAL_IWDG_TIME_UNIT HAL_IWDG_TIME_UNIT_MS
|
||||
/* IWDG hardware start configuration
|
||||
warning: In case of starting IWDG in Hardware mode, make sure that
|
||||
USE_HAL_IWDG_HARDWARE_START is aligned with OB activated set for IWDG */
|
||||
#define USE_HAL_IWDG_HARDWARE_START 0U
|
||||
/* User can choose the value of the LSI frequency with the USE_HAL_IWDG_LSI_FREQ define:
|
||||
- 0U : Dynamic LSI to be computed and set by the user.
|
||||
- LSI_VALUE : LSI value of 32KHz.
|
||||
- (LSI_VALUE / 128U): LSI value of 250Hz */
|
||||
#define USE_HAL_IWDG_LSI_FREQ LSI_VALUE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_LPTIM_Config HAL LPTIM Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_LPTIM Config ################################## */
|
||||
#define USE_HAL_LPTIM_MODULE 0U
|
||||
#define USE_HAL_LPTIM_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_LPTIM_USER_DATA 0U
|
||||
#define USE_HAL_LPTIM_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_LPTIM_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_OPAMP_Config HAL OPAMP Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_OPAMP Config ################################## */
|
||||
#define USE_HAL_OPAMP_MODULE 0U
|
||||
#define USE_HAL_OPAMP_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_OPAMP_USER_DATA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_PCD_Config HAL PCD Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_PCD Config #################################### */
|
||||
#define USE_HAL_PCD_MODULE 1U
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_PCD_USER_DATA 0U
|
||||
#define USE_HAL_PCD_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_PCD_USB_DOUBLE_BUFFER 0U
|
||||
#define USE_HAL_PCD_USB_LPM 0U
|
||||
#define USE_HAL_PCD_USB_BCD 0U
|
||||
#define USE_HAL_PCD_USB_EP_TYPE_ISOC 0U
|
||||
#define USE_HAL_PCD_MAX_ENDPOINT_NB 8U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_PKA_Config HAL PKA Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_PKA Config #################################### */
|
||||
#define USE_HAL_PKA_MODULE 0U
|
||||
#define USE_HAL_PKA_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_PKA_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_PKA_USER_DATA 0U
|
||||
#define USE_HAL_PKA_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_PWR_Config HAL PWR Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_PWR Config #################################### */
|
||||
#define USE_HAL_PWR_MODULE 1U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_RAMCFG_Config HAL RAMCFG Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_RAMCFG Config ################################# */
|
||||
#define USE_HAL_RAMCFG_MODULE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_RCC_Config HAL RCC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_RCC Config #################################### */
|
||||
#define USE_HAL_RCC_MODULE 1U
|
||||
/* Use RCC HAL API for Reset function */
|
||||
#define USE_HAL_RCC_RESET_PERIPH_CLOCK_MANAGEMENT 0U
|
||||
#define USE_HAL_RCC_RESET_RTC_DOMAIN 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_RNG_Config HAL RNG Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_RNG Config #################################### */
|
||||
#define USE_HAL_RNG_MODULE 0U
|
||||
#define USE_HAL_RNG_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RNG_USER_DATA 0U
|
||||
#define USE_HAL_RNG_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_RTC_Config HAL RTC Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_RTC Config #################################### */
|
||||
#define USE_HAL_RTC_MODULE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_SBS_Config HAL SBS Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_SBS Config #################################### */
|
||||
#define USE_HAL_SBS_MODULE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_SMARTCARD_Config HAL SMARTCARD Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_SMARTCARD Config ############################## */
|
||||
#define USE_HAL_SMARTCARD_MODULE 0U
|
||||
#define USE_HAL_SMARTCARD_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMARTCARD_USER_DATA 0U
|
||||
#define USE_HAL_SMARTCARD_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_SMARTCARD_DMA 0U
|
||||
/* #################### SMARTCARD FIFO configuration ######################## */
|
||||
#define USE_HAL_SMARTCARD_FIFO 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_SMBUS_Config HAL SMBUS Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_SMBUS Config ################################## */
|
||||
#define USE_HAL_SMBUS_MODULE 0U
|
||||
#define USE_HAL_SMBUS_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMBUS_USER_DATA 0U
|
||||
#define USE_HAL_SMBUS_GET_LAST_ERRORS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_SPI_Config HAL SPI Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_SPI Config #################################### */
|
||||
#define USE_HAL_SPI_MODULE 0U
|
||||
#define USE_HAL_SPI_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SPI_USER_DATA 0U
|
||||
#define USE_HAL_SPI_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_SPI_DMA 0U
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
#define USE_HAL_SPI_CRC 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_TAMP_Config HAL TAMP Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_TAMP Config ################################### */
|
||||
#define USE_HAL_TAMP_MODULE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_TIM_Config HAL TIM Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_TIM Config #################################### */
|
||||
#define USE_HAL_TIM_MODULE 0U
|
||||
#define USE_HAL_TIM_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_TIM_USER_DATA 0U
|
||||
#define USE_HAL_TIM_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_TIM_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_UART_Config HAL UART Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_UART Config ################################### */
|
||||
#define USE_HAL_UART_MODULE 1U
|
||||
#define USE_HAL_UART_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_UART_USER_DATA 0U
|
||||
#define USE_HAL_UART_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_UART_DMA 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_USART_Config HAL USART Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_USART Config ################################## */
|
||||
#define USE_HAL_USART_MODULE 0U
|
||||
#define USE_HAL_USART_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_USART_USER_DATA 0U
|
||||
#define USE_HAL_USART_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_USART_DMA 0U
|
||||
#define USE_HAL_USART_FIFO 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_WWDG_Config HAL WWDG Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_WWDG Config ################################### */
|
||||
#define USE_HAL_WWDG_MODULE 0U
|
||||
#define USE_HAL_WWDG_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_WWDG_USER_DATA 0U
|
||||
/* WWDG time unit configuration */
|
||||
#define USE_HAL_WWDG_TIME_UNIT HAL_WWDG_TIME_UNIT_MS
|
||||
/* WWDG hardware start configuration
|
||||
warning: In case of starting WWDG in Hardware mode, make sure that
|
||||
USE_HAL_WWDG_HARDWARE_START is aligned with OB activated set for WWDG */
|
||||
#define USE_HAL_WWDG_HARDWARE_START 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_XSPI_Config HAL XSPI Configuration
|
||||
* @{
|
||||
*/
|
||||
/* ########################## HAL_XSPI Config ################################### */
|
||||
#define USE_HAL_XSPI_MODULE 0U
|
||||
#define USE_HAL_XSPI_CLK_ENABLE_MODEL HAL_CLK_ENABLE_NO
|
||||
#define USE_HAL_XSPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_XSPI_USER_DATA 0U
|
||||
#define USE_HAL_XSPI_GET_LAST_ERRORS 0U
|
||||
#define USE_HAL_XSPI_DMA 0U
|
||||
#define USE_HAL_XSPI_HYPERBUS 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* STM32C5XX_HAL_CONF_H */
|
||||
Reference in new issue
Block a user